wiring/src/w204.py
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from sheet import Sheet, STYLE, LW, wrapimport model def status_color(st): st=st.lower() if st.startswith("tbd"): return "#9c1f1f" if st.startswith("assumed"): return "#8a4b00" return "#1b7a3a" def draw(): s = Sheet("204", model.SHEETS[8][1]) x0,y0,x1,y1 = s.frame s.heading(x0+20, y0+30, "PERIPHERAL CONNECTOR PINOUTS — OLED (J10), button flex (J11), battery pack (J12 / PB J1), debug (J13, J14), fan (J17), thermal switch (TP-THSW) — NTS", 14) s.label(x0+20, y0+46, "Pin numbers marked Assumed are drafting proposals to be fixed at EVT schematic capture; none are manufacturer pinouts except where the standard is named. Signal lists come from docs/02 §8, 05 §2.5/§5, 09 §9.1.", 8.5, fill="#333") P = model.PINOUTS def pin_table(x, y, w, key, title=None, status_override=None): d = P[key] s.subheading(x, y, title or key, 10.5) st = status_override or d["status"] lines = wrap("Status: " + st, w, 8) yy = y+12 for l in lines: s.label(x, yy, l, 8, fill=status_color(st), bold=True); yy += 10 rows = [[str(p), sg, nt] for p,sg,nt in d["pins"]] return s.table(x, yy+2, [30, 130, w-160], rows, ["Pin","Signal","Note"], 7.8, pad=3) # ---------------- column 1: pack harness + debug ------------------------------------------ c1 = x0+20; cw = 470 yb = pin_table(c1, y0+72, cw, "J12 Battery pack (MB) / J1 (PB)", "J12 (MB) ↔ J1 (PB) — battery pack harness W-02") # sketch: PB J1 → MB J12 sy = yb+16 s.block("PBJ1", c1, sy, 130, 128, "PB J1", ["pack PCB (PU-W-202)"], [("R",44,"p1","1 PACK+"),("R",58,"p2","2 PACK−"),("R",72,"p3","3 SMB_CLK"),("R",86,"p4","4 SMB_DAT"),("R",100,"p5","5 NTC"),("R",114,"p6","6 PRES#")], port_fs=7.8) s.block("MBJ12", c1+320, sy, 150, 128, "MB J12", ["→ BQ25792 BAT / EC / TS"], [("L",44,"p1","PACK+ → BAT"),("L",58,"p2","PACK− → GND (W-20)"),("L",72,"p3","SMB_CLK → EC"),("L",86,"p4","SMB_DAT → EC"),("L",100,"p5","NTC → BQ25792 TS"),("L",114,"p6","PRES# → EC (pull-up)")], port_fs=7.8) for i,(pid,cls) in enumerate([("p1","POWER"),("p2","POWER"),("p3","BUS"),("p4","BUS"),("p5","CTRL"),("p6","CTRL")]): a=s.A("PBJ1",pid); b=s.A("MBJ12",pid); s.wire(cls,[a,b]) s.label(c1+225, sy+36, "W-02 6-way harness, ~60 mm (est.)", 8, "middle", "#333") s.label(c1+225, sy+128+12, "PACK+/− on one pin each → connector family must be ≥ 5 A/pin (OI-3)", 7.8, "middle", "#9c1f1f") yb = sy+128+24 yb = pin_table(c1, yb+10, cw, "J13 SoC debug UART (MB) — 4-pin 1.0 mm", "J13 — SoC debug UART (SoC side, not EC)") yb = pin_table(c1, yb+16, cw, "J14 EC SWD — Tag-Connect TC2030 (ARM Cortex layout)", "J14 — EC SWD, Tag-Connect TC2030 footprint (no component)") s.label(c1, yb+12, "J14 pin order per Tag-Connect TC2030-CTX ARM Cortex layout (public) — verify against the footprint drawing at layout.", 7.8, fill="#333") # ---------------- column 2: OLED + fan + thermal switch ------------------------------------- c2 = x0+510 yb = pin_table(c2, y0+72, cw, "J10 OLED FPC (MB) — 30-pin 0.5 mm", "J10 — OLED module FPC (W-03), 30-pin 0.5 mm") sy = yb+16 s.block("EC2", c2, sy, 120, 100, "nRF5340 EC", None, [("R",34,"sclk","OLED_SCLK"),("R",48,"sdin","OLED_SDIN"),("R",62,"cs","OLED_CS#"),("R",76,"dc","OLED_DC"),("R",90,"rst","OLED_RST#")], port_fs=7.8) s.block("J10", c2+300, sy, 170, 140, "J10 → OLED module", ["SSD1309, 4-wire SPI"], [("L",34,"sclk","SCLK"),("L",48,"sdin","SDIN"),("L",62,"cs","CS#"),("L",76,"dc","D/C"),("L",90,"rst","RES#"),("L",124,"vcc","VCC 12 V · VDD 3.3 V · GND")], port_fs=7.8) for pid,cls in (("sclk","BUS"),("sdin","BUS"),("cs","CTRL"),("dc","CTRL"),("rst","CTRL")): s.wire(cls,[s.A("EC2",pid), s.A("J10",pid)]) s.block("BST", c2+150, sy+112, 100, 24, "12 V boost", None, [], title_fs=8.5) s.wire("POWER", [(c2+250, sy+124), (c2+300, sy+124)]) s.wire("POWER", [(c2+120, sy+124), (c2+150, sy+124)]); s.label(c2+120, sy+116, "5.0 V SYS", 7.5, fill="#111") s.label(c2+150, sy+108, "TPS61041 class, or inside the module (05 §5)", 7.5, fill="#333") s.label(c2+210, sy+24, "W-03 module FPC; pin numbers TBD", 8, "middle", "#333") yb = sy+140+16 yb = pin_table(c2, yb+10, cw, "J17 Fan header (MB) — 3-pin 1.25 mm, unpopulated", "J17 — fan header, reserved (W-09), unpopulated") yb = pin_table(c2, yb+16, cw, "TP-THSW Thermal switch (MB) — 2 pads", "TP-THSW — mechanical thermal switch leads (W-08)") s.label(c2, yb+12, "Rating 48 °C (docs/02, 06, 09) vs 60 °C class (ADR 00 §3.5) — OI-1; location and interrupted circuit fixed at EVT schematic release.", 7.8, fill="#9c1f1f") # ---------------- column 3: button flex + notes ----------------------------------------------- c3 = x0+1000; cw3 = x1-20-c3 yb = pin_table(c3, y0+72, cw3, "J11 Button flex (MB) — 6-pin 0.5 mm", "J11 — button flex (W-04), 6-pin 0.5 mm FPC") sy = yb+16 # sketch: EC GPIO BTN ← 1k + TVS ← J11 pin 2 ← switch → GND ; ring LED ; HALL alt s.block("EC3", c3, sy, 110, 116, "nRF5340 EC", None, [("R",30,"btn","BTN"),("R",64,"led","LED drive"),("R",98,"hall","HALL (alt.)")], port_fs=7.8) s.block("J11", c3+290, sy, 120, 116, "J11 → flex", None, [("L",30,"p2","2 BTN"),("L",64,"p3","3 RING_LED"),("L",98,"p4","4 HALL_OUT"),("R",30,"q2",""),("R",64,"q3",""),("R",98,"q4","")], port_fs=7.8) bx,by = s.A("EC3","btn"); jx,jy = s.A("J11","p2") s.rect("EQUIPMENT", bx+40, by-6, 40, 12, "#fff", "#222", LW["secondary"]); s.label(bx+60, by+3, "1 kΩ", 7.5, "middle") s.wire("CTRL", [(bx,by),(bx+40,by)]); s.wire("CTRL", [(bx+80,by),(jx,jy)]) s.junction("CTRL", bx+120, by); s.wire("CTRL", [(bx+120,by),(bx+120,by+12)]); s.label(bx+127, by+14, "TVS", 7.5); s.gnd(bx+120, by+12) s.wire("CTRL", [s.A("EC3","led"), s.A("J11","p3")], "ring light-pipe LED drive (if on flex)", fs=7.5, dy=10) s.wire("REF", [s.A("EC3","hall"), s.A("J11","p4")], "only if Hall moves to the flex (OI-4)", fs=7.5) qx,qy = s.A("J11","q2") s.wire("CTRL", [(qx,qy),(qx+12,qy)]); s.path("CONN-CTRL", f"M{qx+12:.1f},{qy:.1f} L{qx+30:.1f},{qy-8:.1f}", STYLE["CTRL"]["stroke"], STYLE["CTRL"]["sw"]); s.wire("CTRL", [(qx+34,qy),(qx+50,qy)]); s.gnd(qx+50, qy) s.label(qx+50, qy+28, "GND pins 1, 6", 7, "middle", STYLE["BOND"]["stroke"]) s.label(qx+30, qy-13, "sealed tact", 7.5, "middle", "#333") lx,ly = s.A("J11","q3"); s.wire("CTRL", [(lx,ly),(lx+16,ly)]); s.path("CONN-CTRL", f"M{lx+16:.1f},{ly-6:.1f} L{lx+28:.1f},{ly:.1f} L{lx+16:.1f},{ly+6:.1f} Z", STYLE["CTRL"]["stroke"], STYLE["CTRL"]["sw"]); s.wire("CTRL", [(lx+28,ly),(lx+50,ly)]); s.label(lx+52, ly+3, "LED", 7, fill="#333") hx,hy = s.A("J11","q4"); s.wire("REF", [(hx,hy),(hx+14,hy)]); s.rect("REFERENCE", hx+14, hy-8, 40, 16, "#fff", "#777", LW["fine"], extra='stroke-dasharray="3 3"'); s.label(hx+34, hy+3, "Hall", 7.5, "middle", "#777") s.label(c3, sy+116+14, "3.3 V AON on pin 5 feeds the LED / Hall (if fitted); GND on pins 1 and 6; series 1 kΩ + TVS on the MB side (09 §5.3).", 8, fill="#333") yb = sy+116+30 notes = [ "W-05 / W-06 — Wi-Fi antenna coax: 2× MHF4 (I-PEX 20449) 1.37 mm, module (M.2 Key-E, X 140–162) → flex elements in the front frame upper band. WIFI0 ≈ 140–150 mm along the chassis top rail (≤ 0.35 dB at 6 GHz); WIFI1 ≈ 60 mm (≤ 0.15 dB). ~30 mating cycles; clipped every 30 mm; ≥ 10 mm from buck inductors; shield to chassis within 10 mm of the element (docs/07 §4.3). Lengths are estimates, not measured.", "W-07 — LED bar: baseline 5× addressable RGB LEDs on the reader board at RB J7, driven by LED_DATA over mezzanine pin 67; alternative is a 4-pin FPC to a light-guide flex (decide at industrial design). Supply: 3.3 V AON if peak ≤ 100 mA, else an LED driver from 5 V SYS (docs/05 §5) — neither rail is on the mezzanine allocation (OI-15).", "W-09 — fan header J17 is a reserved footprint only; the fan decision is taken at the EVT-exit gate (D5). Supply rail and control signal are TBD.", "W-08 — the thermal switch has no connector in docs/09 §9.1; TP-THSW is a placeholder for solder pads or a 2-pin header. The switch must interrupt a circuit where its trip temperature means a fault (charge path / pack region), not the SoM boss (docs/06 §12 item 10).", "OI-3 — pack harness: one pin each for PACK+ and PACK− must carry 5 A charge and 7 A system-path peaks; JST GH (1 A/pin) and XA (3 A/pin) cannot — Molex Micro-Fit 3.0 / Nano-Fit class or two pins per rail (then 8 positions). Pack path rating 10 A cont. / 20 A fuse (09 §2.3) vs 10 A fuse (05 §2.5) to reconcile.", ] s.notes(c3, yb+8, cw3, "Cable and option notes", notes, 7.8, numbered=False) s.titleblock() return s.write()