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<?xml version="1.0" encoding="UTF-8"?><svg xmlns="http://www.w3.org/2000/svg" width="1587" height="1123" viewBox="0 0 1587 1123"><title>PU-W-104 — CFexpress B mode-switch path — lane mux, clock mux, interlock, USB4 bridge</title><desc>PoppyUp — Phase 1 Hardware Design; Wiring & Interconnect Diagram Set; Rev A; 2026-09-27; DRAFT — FOR REVIEW; A3 landscape 420 × 297 mm at 96 dpi</desc><rect width="100%" height="100%" fill="#fff"/><g id="L-BORDER"><rect x="20.0" y="20.0" width="1547.0" height="1083.0" rx="0" fill="none" stroke="#222" stroke-width="1.89" /><rect x="40.0" y="40.0" width="1507.0" height="1043.0" rx="0" fill="none" stroke="#222" stroke-width="0.94" /><text x="134.2" y="34.0" font-size="9" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">1</text><text x="134.2" y="1097.0" font-size="9" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">1</text><line x1="228.4" y1="20.0" x2="228.4" y2="40.0" stroke="#222" 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font-size="10" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">CFexpress B mode-switch path — lane mux, clock mux, interlock,</text><text x="915.0" y="1035.0" font-size="10" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">USB4 bridge</text><text x="915.0" y="1059.0" font-size="9.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">Scale: NTS — NOT TO SCALE Baseline: ADR v0.3</text><text x="915.0" y="1075.0" font-size="9" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">Units: mm where dimensioned Signal names per docs/02 §8, docs/09 §8–9</text><text x="1265.0" y="1025.0" font-size="13" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Sheet PU-W-104</text><text x="1265.0" y="1039.0" font-size="10" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">Rev A 2026-09-27</text><text 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/><text x="470.0" y="112.0" font-size="12" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">PI3DBS16412 2:1 ×2 lane mux</text><line x1="380.0" y1="142.0" x2="386.0" y2="142.0" stroke="#222" stroke-width="1.32"/><text x="389.0" y="145.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">A: SoC lanes</text><line x1="380.0" y1="172.0" x2="386.0" y2="172.0" stroke="#222" stroke-width="1.32"/><text x="389.0" y="175.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">A: SoC REFCLK</text><line x1="380.0" y1="230.0" x2="386.0" y2="230.0" stroke="#222" stroke-width="1.32"/><text x="389.0" y="233.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">B: bridge lanes</text><line x1="380.0" y1="255.0" x2="386.0" y2="255.0" stroke="#222" stroke-width="1.32"/><text x="389.0" y="258.0" font-size="7.5" text-anchor="start" fill="#111" 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stroke="#222" stroke-width="1.32"/><text x="591.0" y="440.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">SLOT_DET[0]</text><line x1="600.0" y1="462.0" x2="594.0" y2="462.0" stroke="#222" stroke-width="1.32"/><text x="591.0" y="465.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">NTC_CFEB (ADC)</text><line x1="600.0" y1="500.0" x2="594.0" y2="500.0" stroke="#222" stroke-width="1.32"/><text x="591.0" y="503.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">CFEB_PERST#</text><line x1="600.0" y1="525.0" x2="594.0" y2="525.0" stroke="#222" stroke-width="1.32"/><text x="591.0" y="528.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">CFEB_CLKREQ#/WAKE# in</text><line x1="490.0" y1="640.0" x2="490.0" y2="634.0" stroke="#222" stroke-width="1.32"/><line x1="510.0" y1="640.0" x2="510.0" y2="634.0" stroke="#222" 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y1="330.0" x2="210.0" y2="336.0" stroke="#222" stroke-width="1.32"/><line x1="300.0" y1="400.0" x2="294.0" y2="400.0" stroke="#222" stroke-width="1.32"/><text x="291.0" y="403.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">BR_CFEB_PERST# out</text><line x1="300.0" y1="425.0" x2="294.0" y2="425.0" stroke="#222" stroke-width="1.32"/><text x="291.0" y="428.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">CLKREQ#/WAKE# in</text><line x1="300.0" y1="455.0" x2="294.0" y2="455.0" stroke="#222" stroke-width="1.32"/><text x="291.0" y="458.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">ASM2464_PWR_EN (load-sw. EN)</text><line x1="300.0" y1="485.0" x2="294.0" y2="485.0" stroke="#222" stroke-width="1.32"/><text x="291.0" y="488.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">3.3 V in</text><line x1="150.0" y1="500.0" x2="150.0" y2="494.0" stroke="#222" stroke-width="1.32"/><line x1="210.0" y1="500.0" x2="210.0" y2="494.0" stroke="#222" stroke-width="1.32"/><line x1="260.0" y1="500.0" x2="260.0" y2="494.0" stroke="#222" stroke-width="1.32"/><rect x="120.0" y="540.0" width="180.0" height="110.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="210.0" y="556.0" font-size="10.5" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">J6 — Port C USB-C 'USB4 FAST'</text><text x="210.0" y="570.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">IP67 mid-mount, USB4-rated receptacle</text><text x="210.0" y="581.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">fitted on both SKUs, blanked on Base</text><text x="210.0" y="592.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">cable W-15 → USB4 host / PD source</text><line x1="150.0" y1="540.0" x2="150.0" y2="546.0" stroke="#222" stroke-width="1.32"/><line x1="210.0" y1="540.0" x2="210.0" y2="546.0" stroke="#222" stroke-width="1.32"/><line x1="260.0" y1="540.0" x2="260.0" y2="546.0" stroke="#222" stroke-width="1.32"/><line x1="160.0" y1="650.0" x2="160.0" y2="644.0" stroke="#222" stroke-width="1.32"/><line x1="260.0" y1="650.0" x2="260.0" y2="644.0" stroke="#222" stroke-width="1.32"/><rect x="120.0" y="690.0" width="180.0" height="60.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" stroke-dasharray="6 3"/><text x="210.0" y="706.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">TPS25750-C — PD sink (Pro)</text><line x1="160.0" y1="690.0" x2="160.0" y2="696.0" stroke="#222" stroke-width="1.32"/><line x1="300.0" y1="723.0" x2="294.0" y2="723.0" stroke="#222" stroke-width="1.32"/><text x="291.0" y="726.0" font-size="7" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">PORTC_ATTACH / PD_PRESENT</text><line x1="300.0" y1="741.0" x2="294.0" y2="741.0" stroke="#222" stroke-width="1.32"/><text x="291.0" y="744.0" font-size="7" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">PD_I2C</text><rect x="680.0" y="96.0" width="150.0" height="490.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="755.0" y="112.0" font-size="12" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">J3 ↔ J6</text><text x="755.0" y="126.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">ADM6 (MB) / ADF6 (RB) 80-pin · W-01</text><line x1="680.0" y1="142.0" x2="686.0" y2="142.0" stroke="#222" stroke-width="1.32"/><text x="689.0" y="145.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">1–8</text><line x1="830.0" y1="142.0" x2="824.0" y2="142.0" stroke="#222" stroke-width="1.32"/><text x="821.0" y="145.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">1–8</text><line x1="680.0" y1="172.0" x2="686.0" y2="172.0" stroke="#222" stroke-width="1.32"/><text x="689.0" y="175.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">9–10</text><line x1="830.0" y1="172.0" x2="824.0" y2="172.0" stroke="#222" stroke-width="1.32"/><text x="821.0" y="175.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">9–10</text><line x1="680.0" y1="245.0" x2="686.0" y2="245.0" stroke="#222" stroke-width="1.32"/><text x="689.0" y="248.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, 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text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">61</text><line x1="680.0" y1="462.0" x2="686.0" y2="462.0" stroke="#222" stroke-width="1.32"/><text x="689.0" y="465.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">70</text><line x1="830.0" y1="462.0" x2="824.0" y2="462.0" stroke="#222" stroke-width="1.32"/><text x="821.0" y="465.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">70</text><line x1="680.0" y1="500.0" x2="686.0" y2="500.0" stroke="#222" stroke-width="1.32"/><text x="689.0" y="503.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">11</text><line x1="830.0" y1="500.0" x2="824.0" y2="500.0" stroke="#222" stroke-width="1.32"/><text x="821.0" y="503.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">11</text><line x1="680.0" y1="525.0" x2="686.0" y2="525.0" stroke="#222" stroke-width="1.32"/><text x="689.0" y="528.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">12–13</text><line x1="830.0" y1="525.0" x2="824.0" y2="525.0" stroke="#222" stroke-width="1.32"/><text x="821.0" y="528.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">12–13</text><line x1="680.0" y1="565.0" x2="686.0" y2="565.0" stroke="#222" stroke-width="1.32"/><text x="689.0" y="568.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">72–80</text><line x1="830.0" y1="565.0" x2="824.0" y2="565.0" stroke="#222" stroke-width="1.32"/><text x="821.0" y="568.0" font-size="7.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">72–80</text><line x1="755.0" y1="130.0" x2="755.0" y2="586.0" stroke="#555" stroke-width="0.68" stroke-dasharray="4 3"/><rect x="1300.0" y="100.0" width="220.0" height="450.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="1410.0" y="116.0" font-size="12" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">J1 — CFexpress Type B slot</text><line x1="1300.0" y1="142.0" x2="1306.0" y2="142.0" stroke="#222" stroke-width="1.32"/><text x="1309.0" y="145.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">PCIe lane 0/1 TX/RX</text><line x1="1300.0" y1="172.0" x2="1306.0" y2="172.0" stroke="#222" stroke-width="1.32"/><text x="1309.0" y="175.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">REFCLK</text><line x1="1300.0" y1="245.0" x2="1306.0" y2="245.0" stroke="#222" stroke-width="1.32"/><text x="1309.0" y="248.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">3.3 V</text><line x1="1300.0" y1="437.0" x2="1306.0" y2="437.0" stroke="#222" stroke-width="1.32"/><text x="1309.0" y="440.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">card-detect</text><line x1="1300.0" y1="500.0" x2="1306.0" y2="500.0" stroke="#222" stroke-width="1.32"/><text x="1309.0" y="503.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">PERST#</text><line x1="1300.0" y1="525.0" x2="1306.0" y2="525.0" stroke="#222" stroke-width="1.32"/><text x="1309.0" y="528.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">CLKREQ# / WAKE#</text><rect x="920.0" y="200.0" width="190.0" height="90.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="1015.0" y="216.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">eFuse TPS2596 class — CFe B</text><text x="1015.0" y="230.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">limit 2.5 A (09 §5.2) / 2.0 A (05 §3.2) — OI-2</text><text x="1015.0" y="241.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">soft-start 1–2 ms, reverse-current block,</text><text x="1015.0" y="252.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">active discharge · FLT# → SLOT_FAULT# (pin 60)</text><line x1="920.0" y1="245.0" x2="926.0" y2="245.0" stroke="#222" stroke-width="1.32"/><line x1="1110.0" y1="245.0" x2="1104.0" y2="245.0" stroke="#222" stroke-width="1.32"/><line x1="1000.0" y1="290.0" x2="1000.0" y2="284.0" stroke="#222" stroke-width="1.32"/><rect x="970.0" y="320.0" width="60.0" height="44.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="1000.0" y="336.0" font-size="13" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">&</text><line x1="970.0" y1="342.0" x2="976.0" y2="342.0" stroke="#222" stroke-width="1.32"/><line x1="1030.0" y1="342.0" x2="1024.0" y2="342.0" stroke="#222" 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stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M300.0,723.0 L340.0,723.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M120.0,158.0 L75.0,158.0 L75.0,792.0 L470.0,792.0 L470.0,640.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M470.0,640.0 L466.8,647.0 L473.2,647.0 Z" fill="#1b7a3a"/><path d="M490.0,640.0 L490.0,808.0 L85.0,808.0 L85.0,176.0 L120.0,176.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M120.0,176.0 L113.0,172.8 L113.0,179.2 Z" fill="#1b7a3a"/><path d="M1000.0,320.0 L1000.0,290.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M830.0,412.0 L900.0,412.0 L900.0,342.0 L970.0,342.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M970.0,342.0 L963.0,338.8 L963.0,345.2 Z" fill="#1b7a3a"/><path d="M1300.0,437.0 L830.0,437.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M830.0,437.0 L837.0,440.2 L837.0,433.8 Z" fill="#1b7a3a"/><circle cx="1060.0" cy="437.0" r="2.6" fill="#1b7a3a" stroke="none" stroke-width="1"/><path d="M1060.0,437.0 L1060.0,342.0 L1030.0,342.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M1030.0,342.0 L1037.0,345.2 L1037.0,338.8 Z" fill="#1b7a3a"/><path d="M1140.0,463.0 L1140.0,462.0 L830.0,462.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M830.0,462.0 L837.0,465.2 L837.0,458.8 Z" fill="#1b7a3a"/><path d="M830.0,500.0 L1300.0,500.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M1300.0,500.0 L1293.0,496.8 L1293.0,503.2 Z" fill="#1b7a3a"/><path d="M1300.0,525.0 L830.0,525.0" fill="none" stroke="#1b7a3a" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="7 3"/><path d="M830.0,525.0 L837.0,528.2 L837.0,521.8 Z" fill="#1b7a3a"/></g><g id="L-CONN-BUS"><path d="M300.0,741.0 L340.0,741.0" fill="none" stroke="#8a4b00" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="9 3 2 3"/><path d="M120.0,194.0 L95.0,194.0 L95.0,824.0 L510.0,824.0 L510.0,640.0" fill="none" stroke="#8a4b00" stroke-width="1.06" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="9 3 2 3"/><path d="M510.0,640.0 L506.8,647.0 L513.2,647.0 Z" fill="#8a4b00"/><path d="M120.0,194.0 L113.0,190.8 L113.0,197.2 Z" fill="#8a4b00"/></g><g id="L-CONN-REF"><path d="M374.0,330.0 L340.0,330.0" fill="none" stroke="#777777" stroke-width="0.94" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="4 3"/><path d="M374.0,330.0 L367.0,326.8 L367.0,333.2 Z" fill="#777777"/><path d="M552.0,366.0 L552.0,358.0 L600.0,358.0 L600.0,276.0 L560.0,276.0" fill="none" stroke="#777777" stroke-width="0.94" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="4 3"/><path d="M560.0,276.0 L567.0,279.2 L567.0,272.8 Z" fill="#777777"/></g><g id="L-ANNOTATION"><text x="60.0" y="66.0" font-size="14" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">CFEXPRESS B MODE-SWITCH PATH — lane mux, REFCLK mux, hardware interlock, USB4 bridge, Port C</text><text x="60.0" y="81.0" font-size="8.5" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">Logical wiring, NTS. MB = main board, RB = reader daughterboard, EC = nRF5340. Pro-only population dashed (ASM2464PD, TPS25750-C, TPS2121-class mux). Sources: docs/02 §4.2, §6, §8; docs/09 §3.2, §4.1, §5.2, §5.4, §8.1.</text><text x="470.0" y="196.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">16 GT/s passive differential switch (2 lanes)</text><text x="470.0" y="207.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">+ HCSL 2:1 REFCLK mux (PI6C59S6005 class)</text><text x="470.0" y="218.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">SEL common to both, driven by the latch Q</text><text x="340.0" y="137.0" font-size="7" text-anchor="middle" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">4 pairs Gen3</text><text x="340.0" y="181.0" font-size="7" text-anchor="middle" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">HCSL 100 Ω</text><text x="620.0" y="137.0" font-size="7" text-anchor="middle" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">4 pairs · L3 ≤ 30 mm</text><text x="620.0" y="181.0" font-size="7" text-anchor="middle" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">REFCLK+/− (mux out)</text><path d="M338.0,322.0 L315.2,322.0 L307.2,330.0 L315.2,338.0 L338.0,338.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="334.0" y="333.0" font-size="7" text-anchor="end" fill="#333" font-family="Helvetica, Arial, sans-serif">OI-9</text><text x="456.0" y="292.0" font-size="7" text-anchor="start" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">Q → SEL (held while slot powered)</text><text x="500.0" y="570.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">Single owner of every CFe B reset, clock-request</text><text x="500.0" y="581.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">and select line; sidebands never pass the mux (02 §6.1)</text><text x="426.0" y="362.0" font-size="7" text-anchor="start" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">MUX_SEL → D</text><text x="604.0" y="318.0" font-size="6.4" text-anchor="start" fill="#777" font-family="Helvetica, Arial, sans-serif">REFCLK_SEL</text><text x="604.0" y="327.0" font-size="6.4" text-anchor="start" fill="#777" font-family="Helvetica, Arial, sans-serif">(test pin; = MUX_SEL)</text><text x="640.0" y="408.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">pin 55</text><text x="640.0" y="433.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">pin 61</text><text x="640.0" y="458.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">pin 70 (analog)</text><text x="640.0" y="496.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">pin 11</text><text x="640.0" y="521.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">pins 12–13</text><text x="163.0" y="322.0" font-size="7" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif">Gen4 ×2</text><text x="213.0" y="322.0" font-size="7" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif">REFCLK out</text><text x="270.0" y="225.0" font-size="7" text-anchor="middle" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">4 pairs Gen4 · L3 ≤ 50 mm · 220 nF AC caps at TX</text><text x="295.0" y="264.0" font-size="7" text-anchor="middle" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">bridge downstream REFCLK</text><path d="M304.0,477.0 L423.7,477.0 L431.7,485.0 L423.7,493.0 L304.0,493.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="308.0" y="488.0" font-size="6.8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">3.3 V LOGIC via load sw. · P-21</text><text x="268.0" y="517.0" font-size="6.8" text-anchor="start" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">USB4 TX1/RX1 TX2/RX2 · SBU1/2 · D±</text><text x="268.0" y="528.0" font-size="6.5" text-anchor="start" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">≤ 60 mm Megtron 6, ≤ 4 dB at 10 GHz</text><text x="210.0" y="762.0" font-size="6.8" text-anchor="middle" fill="#9c1f1f" font-family="Helvetica, Arial, sans-serif">owns CC1/CC2; ASM2464PD PD block passive (00 §3.4) — verify, OI-12</text><text x="166.0" y="673.0" font-size="7" text-anchor="start" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">CC1 / CC2</text><path d="M303.0,662.0 L403.8,662.0 L411.8,670.0 L403.8,678.0 L303.0,678.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="307.0" y="673.0" font-size="7" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">VBUS → TPS2121 mux · P-02</text><path d="M343.0,715.0 L365.8,715.0 L373.8,723.0 L365.8,731.0 L343.0,731.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="347.0" y="726.0" font-size="7" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">→ EC</text><path d="M343.0,733.0 L365.8,733.0 L373.8,741.0 L365.8,749.0 L343.0,749.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="347.0" y="744.0" font-size="7" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">↔ EC</text><text x="272.5" y="787.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">SOC_CFEB_PERST_REQ# — SoC root-port PERST request; the EC mirrors it to the slot in standalone mode (< 1 ms)</text><text x="287.5" y="803.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">CFEB_CLKREQ# / CFEB_WAKE# → SoC (2× open-drain from the EC, only while the SoC owns the card)</text><text x="302.5" y="819.0" font-size="7" text-anchor="middle" fill="#8a4b00" font-family="Helvetica, Arial, sans-serif">EC_SOC_UART / I²C — HOST_C_ATTACH, CFEB_RELEASED, CFEB_RETURNED, MODE_READER_C (02 §6.3)</text><text x="755.0" y="135.0" font-size="6.6" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">CFe B lanes</text><text x="755.0" y="165.0" font-size="6.6" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">REFCLK</text><text x="755.0" y="238.0" font-size="6.6" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">3.3 V SLOTS</text><text x="755.0" y="405.0" font-size="6.6" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">CFEB_PWR_EN</text><text x="755.0" y="430.0" font-size="6.6" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">SLOT_DET[0]</text><text x="755.0" y="455.0" font-size="6.6" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">NTC_CFEB</text><text x="755.0" y="493.0" font-size="6.6" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">PERST#</text><text x="755.0" y="518.0" font-size="6.6" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">CLKREQ#/WAKE#</text><text x="755.0" y="558.0" font-size="6.6" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">GND ×9 + pattern</text><path d="M586.0,237.0 L660.8,237.0 L668.8,245.0 L660.8,253.0 L586.0,253.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="590.0" y="248.0" font-size="7" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">3.3 V SLOTS · P-15</text><text x="850.0" y="100.0" font-size="8" text-anchor="start" fill="#555" font-family="Helvetica, Arial, sans-serif">RB — reader daughterboard (mated to the MB via J3/J6, W-01)</text><text x="1410.0" y="285.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">push-push, deep insertion, metal cage, 10 k cycles</text><text x="1410.0" y="296.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">card = NVMe; Gen3 ×2 to SoC / Gen4 ×2 to bridge</text><text x="1410.0" y="307.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">TVS ≤ 0.3 pF on lane pairs + CLKREQ#/PERST#</text><text x="1410.0" y="318.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">AC caps: the card carries its TX caps; ours sit</text><text x="1410.0" y="329.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">at the mux inputs from SoC and bridge (09 §4)</text><text x="1410.0" y="340.0" font-size="7.2" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">cage: Cu pour + 40 thermal vias → pad → rib</text><text x="1065.0" y="137.0" font-size="7" text-anchor="middle" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">4 pairs · RB L3 straight run ≤ 40 mm · Gen4-capable · whole mux path ≤ 120 mm, ≤ 8 dB at 8 GHz (09 §3.2)</text><text x="1065.0" y="181.0" font-size="7" text-anchor="middle" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">REFCLK+/− 100 Ω HCSL</text><text x="1205.0" y="240.0" font-size="7" text-anchor="middle" fill="#111111" font-family="Helvetica, Arial, sans-serif">3.3 V slot rail (per-slot island, 47 µF)</text><text x="1006.0" y="308.0" font-size="7" text-anchor="start" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">EN</text><text x="865.0" y="408.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">CFEB_PWR_EN</text><text x="1065.0" y="433.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">card-detect → SLOT_DET[0] (EC wake); slot powered only with a card present (09 §5.2)</text><text x="1065.0" y="496.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">CFEB_PERST# — driven by the EC; follows the SoC's request or the bridge's PERST by mode</text><text x="1065.0" y="534.0" font-size="7" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">CFEB_CLKREQ# / CFEB_WAKE# from the slot → EC → forwarded to the active root (SoC or bridge)</text><text x="850.0" y="640.0" font-size="9.5" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Hardware routing by mode (docs/02 §6.1)</text><rect x="850.0" y="648.0" width="680.0" height="15.8" rx="0" fill="#e9e9e9" stroke="#444" stroke-width="0.49" /><text x="853.0" y="658.8" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Element</text><line x1="1040.0" y1="648.0" x2="1040.0" y2="663.8" stroke="#444" stroke-width="0.49"/><text x="1043.0" y="658.8" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Standalone</text><line x1="1280.0" y1="648.0" x2="1280.0" y2="663.8" stroke="#444" stroke-width="0.49"/><text x="1283.0" y="658.8" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Port C host mode</text><rect x="850.0" y="663.8" width="680.0" height="15.8" rx="0" fill="#fff" stroke="#444" stroke-width="0.49" /><text x="853.0" y="674.5" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">PI3DBS16412 lanes</text><line x1="1040.0" y1="663.8" x2="1040.0" y2="679.5" stroke="#444" stroke-width="0.49"/><text x="1043.0" y="674.5" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">A: SoC pcie3x4 ↔ slot</text><line x1="1280.0" y1="663.8" x2="1280.0" y2="679.5" stroke="#444" stroke-width="0.49"/><text x="1283.0" y="674.5" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">B: ASM2464PD ↔ slot</text><rect x="850.0" y="679.5" width="680.0" height="15.8" rx="0" fill="#fafafa" stroke="#444" stroke-width="0.49" /><text x="853.0" y="690.3" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">REFCLK mux</text><line x1="1040.0" y1="679.5" x2="1040.0" y2="695.2" stroke="#444" stroke-width="0.49"/><text x="1043.0" y="690.3" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">SoC root REFCLK → slot</text><line x1="1280.0" y1="679.5" x2="1280.0" y2="695.2" stroke="#444" stroke-width="0.49"/><text x="1283.0" y="690.3" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">ASM2464PD REFCLK → slot</text><rect x="850.0" y="695.2" width="680.0" height="15.8" rx="0" fill="#fff" stroke="#444" stroke-width="0.49" /><text x="853.0" y="706.0" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">CFEB_PERST#</text><line x1="1040.0" y1="695.2" x2="1040.0" y2="711.0" stroke="#444" stroke-width="0.49"/><text x="1043.0" y="706.0" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">EC, follows SOC_CFEB_PERST_REQ#</text><line x1="1280.0" y1="695.2" x2="1280.0" y2="711.0" stroke="#444" stroke-width="0.49"/><text x="1283.0" y="706.0" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">EC, follows BR_CFEB_PERST#</text><rect x="850.0" y="711.0" width="680.0" height="15.8" rx="0" fill="#fafafa" stroke="#444" stroke-width="0.49" /><text x="853.0" y="721.8" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">CLKREQ# / WAKE# from slot</text><line x1="1040.0" y1="711.0" x2="1040.0" y2="726.8" stroke="#444" stroke-width="0.49"/><text x="1043.0" y="721.8" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">EC → SoC (open-drain)</text><line x1="1280.0" y1="711.0" x2="1280.0" y2="726.8" stroke="#444" stroke-width="0.49"/><text x="1283.0" y="721.8" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">EC → ASM2464PD (open-drain)</text><rect x="850.0" y="726.8" width="680.0" height="15.8" rx="0" fill="#fff" stroke="#444" stroke-width="0.49" /><text x="853.0" y="737.5" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">CFEB_PWR_EN (slot eFuse)</text><line x1="1040.0" y1="726.8" x2="1040.0" y2="742.5" stroke="#444" stroke-width="0.49"/><text x="1043.0" y="737.5" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">on</text><line x1="1280.0" y1="726.8" x2="1280.0" y2="742.5" stroke="#444" stroke-width="0.49"/><text x="1283.0" y="737.5" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">on, after the mux settles</text><rect x="850.0" y="742.5" width="680.0" height="15.8" rx="0" fill="#fafafa" stroke="#444" stroke-width="0.49" /><text x="853.0" y="753.3" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">ASM2464_PWR_EN</text><line x1="1040.0" y1="742.5" x2="1040.0" y2="758.2" stroke="#444" stroke-width="0.49"/><text x="1043.0" y="753.3" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">off — bridge unpowered, zero draw</text><line x1="1280.0" y1="742.5" x2="1280.0" y2="758.2" stroke="#444" stroke-width="0.49"/><text x="1283.0" y="753.3" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">on</text><rect x="850.0" y="758.2" width="680.0" height="15.8" rx="0" fill="#fff" stroke="#444" stroke-width="0.49" /><text x="853.0" y="769.0" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">Port C VBUS → charger (Pro)</text><line x1="1040.0" y1="758.2" x2="1040.0" y2="774.0" stroke="#444" stroke-width="0.49"/><text x="1043.0" y="769.0" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">mux passes Port A only</text><line x1="1280.0" y1="758.2" x2="1280.0" y2="774.0" stroke="#444" stroke-width="0.49"/><text x="1283.0" y="769.0" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">Port C OR-ed via TPS2121; Port A wins</text><rect x="850.0" y="774.0" width="680.0" height="15.8" rx="0" fill="#fafafa" stroke="#444" stroke-width="0.49" /><text x="853.0" y="784.8" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">NVMe namespace write-protect</text><line x1="1040.0" y1="774.0" x2="1040.0" y2="789.8" stroke="#444" stroke-width="0.49"/><text x="1043.0" y="784.8" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">WPS = 0</text><line x1="1280.0" y1="774.0" x2="1280.0" y2="789.8" stroke="#444" stroke-width="0.49"/><text x="1283.0" y="784.8" font-size="7.8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">WPS = 1 set by SoC before release (D8)</text><rect x="850.0" y="799.8" width="680.0" height="96.2" rx="0" fill="#fff" stroke="#222" stroke-width="0.68" /><text x="858.0" y="814.8" font-size="9.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Notes</text><text x="858.0" y="831.5" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">• SoC → mux A: Gen3 (8 GT/s) on L5 FR-4, ≤ 100 mm; mux → J3: MB L3 Megtron 6 ≤ 30 mm; RB ≤ 40 mm (09 §3.2). Card-side REFCLK: 100 Ω HCSL, 33 Ω series + 49.9 Ω shunt at</text><text x="870.0" y="841.3" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">the source, ≤ 0.5 ps RMS additive jitter through the mux (09 §4.1).</text><text x="858.0" y="851.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">• Interlock (09 §5.4): D = EC MUX_SEL, LE = NOT CFEB_PWR_EN_SENSE, Q → both SEL pins — an unintended flip with a live card is impossible regardless of EC firmware.</text><text x="870.0" y="860.8" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">OI-9: 09 §5.4 takes the sense from the eFuse power-good, but that eFuse is on the RB and the 09 §8.1 mezzanine allocation has no PG return pin.</text><text x="858.0" y="870.5" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">• ASM2464PD: 3.3 V LOGIC through a load switch (EN = ASM2464_PWR_EN), 1.05 V point-of-load buck ≤ 15 mm, SPI flash for its firmware; USB4 pairs to J6 use a ≤ 0.2 pF</text><text x="870.0" y="880.3" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">TVS (09 §5.1, §5.3). Base SKU: ASM2464PD, TPS25750-C and the TPS2121-class mux are depopulated; J6 is fitted and blanked and its VBUS pin goes only to attach detection</text><text x="870.0" y="890.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">(05 §7.5).</text><rect x="60.0" y="836.0" width="740.0" height="106.0" rx="0" fill="#fff" stroke="#222" stroke-width="0.68" /><text x="68.0" y="851.0" font-size="9.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Entering Port C host mode — EC-sequenced (docs/02 §6.3; target: card visible to the host in < 5 s)</text><text x="68.0" y="867.8" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">1. Port C attach: TPS25750-C → PORTC_ATTACH → EC → UART HOST_C_ATTACH → SoC (≤ 50 ms). Pro: the Mac's VBUS is accepted at the charger through the priority mux from this moment.</text><text x="68.0" y="877.5" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">2. SoC finishes the current part, checkpoints, fsyncs the job DB (≤ 1000 ms); unmounts the RO filesystem; Set Features 0x84 WPS = 1 if the card reports NWPC (≤ 50 ms) — else bridge</text><text x="80.0" y="887.3" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">WP (UAS) or user consent before flipping (02 §4.10).</text><text x="68.0" y="897.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">3. SoC removes the PCI device, root port → D3, UART CFEB_RELEASED (≤ 400 ms; t ≤ 1500 ms cumulative).</text><text x="68.0" y="906.8" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">4. EC: CFEB_PERST# low → CFEB_PWR_EN off, 200 ms dwell (active discharge, card < 0.3 V within 150 ms) → MUX_SEL = B, REFCLK_SEL = B (latch open while unpowered; 10 ms).</text><text x="68.0" y="916.5" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">5. EC: ASM2464_PWR_EN on → bridge boots from SPI flash (300–500 ms) → CFEB_PWR_EN on, 100 ms → CFEB_PERST# released, now following BR_CFEB_PERST#.</text><text x="68.0" y="926.3" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">6. Bridge trains Gen4 ×2 (≤ 300 ms); USB4 tunnel or USB 3.2 UAS enumeration; host mounts (1000–2000 ms); EC → SoC MODE_READER_C. Total ≈ 3.5–4.5 s. Exit reverses (02 §6.4): PERST#</text><text x="80.0" y="936.0" font-size="7.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">low, PWR_EN off 200 ms, bridge off, MUX_SEL = A, PWR_EN on, CFEB_RETURNED, SoC clears WPS, remounts RO.</text></g></svg>