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<?xml version="1.0" encoding="UTF-8"?><svg xmlns="http://www.w3.org/2000/svg" width="1587" height="1123" viewBox="0 0 1587 1123"><title>PU-W-101 — System interconnect — boards, modules, harnesses and external ports</title><desc>PoppyUp — Phase 1 Hardware Design; Wiring & Interconnect Diagram Set; Rev A; 2026-09-27; DRAFT — FOR REVIEW; A3 landscape 420 × 297 mm at 96 dpi</desc><rect width="100%" height="100%" fill="#fff"/><g id="L-BORDER"><rect x="20.0" y="20.0" width="1547.0" height="1083.0" rx="0" fill="none" stroke="#222" stroke-width="1.89" /><rect x="40.0" y="40.0" width="1507.0" height="1043.0" rx="0" fill="none" stroke="#222" stroke-width="0.94" /><text x="134.2" y="34.0" font-size="9" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">1</text><text x="134.2" y="1097.0" font-size="9" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">1</text><line x1="228.4" y1="20.0" x2="228.4" y2="40.0" stroke="#222" stroke-width="0.68"/><line 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font-family="Helvetica, Arial, sans-serif" font-weight="bold">System interconnect — boards, modules, harnesses and external</text><text x="915.0" y="1035.0" font-size="10" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">ports</text><text x="915.0" y="1059.0" font-size="9.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">Scale: NTS — NOT TO SCALE Baseline: ADR v0.3</text><text x="915.0" y="1075.0" font-size="9" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">Units: mm where dimensioned Signal names per docs/02 §8, docs/09 §8–9</text><text x="1265.0" y="1025.0" font-size="13" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Sheet PU-W-101</text><text x="1265.0" y="1039.0" font-size="10" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">Rev A 2026-09-27</text><text x="1265.0" y="1059.0" font-size="10" text-anchor="start" fill="#9c1f1f" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Status: DRAFT — FOR REVIEW</text><text x="1265.0" y="1075.0" font-size="10" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">Sheet 2 of 10</text><text x="1430.0" y="1025.0" font-size="9" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">Prepared: hw architecture</text><text x="1430.0" y="1039.0" font-size="9" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">(auto-generated set)</text><text x="1430.0" y="1059.0" font-size="9" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">Reviewed: —</text><text x="1430.0" y="1075.0" font-size="9" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">Approved: —</text><rect x="48.0" y="987.0" width="492.0" height="70.0" rx="0" fill="#fff" stroke="#222" stroke-width="0.68" /><text x="54.0" y="1000.0" font-size="9" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">LEGEND — connection classes (colour + line type)</text><line x1="54.0" y1="1011.0" x2="88.0" y2="1011.0" stroke="#111111" stroke-width="2.08"/><text x="94.0" y="1014.0" font-size="8.5" text-anchor="start" fill="#222" font-family="Helvetica, Arial, sans-serif">Power (VBUS, VBAT, VSYS, rails)</text><line x1="54.0" y1="1023.0" x2="88.0" y2="1023.0" stroke="#1f4e9c" stroke-width="1.32"/><text x="94.0" y="1026.0" font-size="8.5" text-anchor="start" fill="#222" font-family="Helvetica, Arial, sans-serif">High-speed data (PCIe, USB, USB4, MDI)</text><line x1="54.0" y1="1035.0" x2="88.0" y2="1035.0" stroke="#1b7a3a" stroke-width="1.06" stroke-dasharray="7 3"/><text x="94.0" y="1038.0" font-size="8.5" text-anchor="start" fill="#222" font-family="Helvetica, Arial, sans-serif">Control / discrete (GPIO, enables, detects)</text><line x1="54.0" y1="1047.0" x2="88.0" y2="1047.0" stroke="#8a4b00" stroke-width="1.06" stroke-dasharray="9 3 2 3"/><text x="94.0" y="1050.0" font-size="8.5" text-anchor="start" fill="#222" font-family="Helvetica, Arial, sans-serif">Serial bus (I²C, SMBus, SPI, UART)</text><line x1="294.0" y1="1011.0" x2="328.0" y2="1011.0" stroke="#9c1f1f" stroke-width="1.32" stroke-dasharray="12 2 2 2"/><text x="334.0" y="1014.0" font-size="8.5" text-anchor="start" fill="#222" font-family="Helvetica, Arial, sans-serif">RF coax (MHF4)</text><line x1="294.0" y1="1023.0" x2="328.0" y2="1023.0" stroke="#4c7c1c" stroke-width="1.13" stroke-dasharray="3 3"/><text x="334.0" y="1026.0" font-size="8.5" text-anchor="start" fill="#222" font-family="Helvetica, Arial, sans-serif">Chassis / ground bond</text><line x1="294.0" y1="1035.0" x2="328.0" y2="1035.0" stroke="#777777" stroke-width="0.94" stroke-dasharray="4 3"/><text x="334.0" y="1038.0" font-size="8.5" text-anchor="start" fill="#222" font-family="Helvetica, Arial, sans-serif">Reserved, alternative or depopulated</text><line x1="294.0" y1="1047.0" x2="328.0" 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font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">board-down RK3588J — decided at PoC exit (D12)</text><text x="730.0" y="522.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">pcie3x4, pcie3x2, 3× Gen2, USB3 OTG0/1, USB2 ×2, SPI TPM,</text><text x="730.0" y="533.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">UART / I²C / GPIO to EC, 5.0 V SYS in</text><line x1="600.0" y1="480.0" x2="606.0" y2="480.0" stroke="#222" stroke-width="1.32"/><rect x="60.0" y="280.0" width="240.0" height="40.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="180.0" y="296.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">OLED — 2.42" 128 × 64, SSD1309</text><line x1="300.0" y1="300.0" x2="294.0" y2="300.0" stroke="#222" stroke-width="1.32"/><rect x="60.0" y="340.0" width="240.0" height="40.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="180.0" y="356.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">BTNFLX — button flex (front frame)</text><line x1="300.0" y1="360.0" x2="294.0" y2="360.0" stroke="#222" stroke-width="1.32"/><rect x="60.0" y="410.0" width="240.0" height="140.0" rx="3" fill="#fbfbfb" stroke="#222" stroke-width="1.32" /><text x="180.0" y="426.0" font-size="12" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">PACK — battery pack 2S2P 21700, 72 Wh</text><text x="180.0" y="440.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">certified sub-assembly, behind screw-down door</text><rect x="80.0" y="455.0" width="200.0" height="82.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="180.0" y="471.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">PB — pack PCB (2L)</text><text x="180.0" y="485.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">BQ40Z50-R2 · BQ294xx · 10 A fuse · 2× NTC</text><line x1="280.0" y1="500.0" x2="274.0" y2="500.0" stroke="#222" stroke-width="1.32"/><text x="271.0" y="503.0" font-size="8.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">J1</text><line x1="280.0" y1="523.0" x2="274.0" y2="523.0" stroke="#222" stroke-width="1.32"/><text x="271.0" y="526.0" font-size="8.5" text-anchor="end" fill="#111" font-family="Helvetica, Arial, sans-serif">PACK−</text><rect x="60.0" y="570.0" width="240.0" height="40.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" stroke-dasharray="6 3"/><text x="180.0" y="586.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">THSW — mechanical thermal switch</text><text x="180.0" y="600.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">chassis inner wall, location TBD (OI-1)</text><line x1="300.0" y1="590.0" x2="294.0" y2="590.0" stroke="#222" stroke-width="1.32"/><rect x="60.0" y="630.0" width="240.0" height="40.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" stroke-dasharray="6 3"/><text x="180.0" y="646.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">FAN — tunnel fan (reserved envelope)</text><text x="180.0" y="660.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">not fitted; decision at EVT exit (D5)</text><line x1="300.0" y1="650.0" x2="294.0" y2="650.0" stroke="#222" stroke-width="1.32"/><rect x="1230.0" y="95.0" width="210.0" height="45.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="1335.0" y="111.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">LEDBAR — 5-segment RGB bar</text><text x="1335.0" y="125.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">front top edge, over the slot row</text><line x1="1230.0" y1="117.0" x2="1236.0" y2="117.0" stroke="#222" stroke-width="1.32"/><rect x="1230.0" y="175.0" width="100.0" height="42.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="1280.0" y="191.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">ANTW0</text><text x="1280.0" y="205.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">Wi-Fi flex, X 12–52</text><line x1="1280.0" y1="217.0" x2="1280.0" y2="211.0" stroke="#222" stroke-width="1.32"/><rect x="1345.0" y="175.0" width="95.0" height="42.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="1392.5" y="191.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">ANTW1</text><text x="1392.5" y="205.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">Wi-Fi flex, X 130–170</text><line x1="1392.5" y1="217.0" x2="1392.5" y2="211.0" stroke="#222" stroke-width="1.32"/><rect x="1230.0" y="290.0" width="210.0" height="90.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="1335.0" y="306.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">WIFI — M.2 Key-E 2230, MT7925</text><text x="1335.0" y="320.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">Wi-Fi 7 2×2; pcie2x1l1; BT held in reset</text><text x="1335.0" y="331.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">2× MHF4 (I-PEX 20449) on the module</text><line x1="1280.0" y1="290.0" x2="1280.0" y2="296.0" stroke="#222" stroke-width="1.32"/><line x1="1392.0" y1="290.0" x2="1392.0" y2="296.0" stroke="#222" stroke-width="1.32"/><line x1="1230.0" y1="326.0" x2="1236.0" y2="326.0" stroke="#222" stroke-width="1.32"/><rect x="1230.0" y="400.0" width="210.0" height="50.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" stroke-dasharray="6 3"/><text x="1335.0" y="416.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">NVME — M.2 M-key 2280 SSD (Pro)</text><text x="1335.0" y="430.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">socket J9 present, empty on Base</text><line x1="1230.0" y1="425.0" x2="1236.0" y2="425.0" stroke="#222" stroke-width="1.32"/><rect x="1230.0" y="640.0" width="210.0" height="80.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="1335.0" y="656.0" font-size="10" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">CHASSIS — Mg AZ91D die-cast</text><text x="1335.0" y="670.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">ground reference; masked bare conversion-</text><text x="1335.0" y="681.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">coated lands; Zn-Ni / Al fasteners only (D4)</text><line x1="1230.0" y1="664.0" x2="1236.0" y2="664.0" stroke="#222" stroke-width="1.32"/><line x1="1230.0" y1="704.0" x2="1236.0" y2="704.0" stroke="#222" stroke-width="1.32"/><line x1="1440.0" y1="664.0" x2="1434.0" y2="664.0" stroke="#222" stroke-width="1.32"/><rect x="440.0" y="790.0" width="120.0" height="52.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="500.0" y="806.0" font-size="9" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">EXT-A — Port A host</text><text x="500.0" y="820.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">iPhone · Mac · PC · charger</text><text x="500.0" y="831.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">PD ≤ 100 W · USB3 Gen1</text><line x1="500.0" y1="790.0" x2="500.0" y2="796.0" stroke="#222" stroke-width="1.32"/><rect x="560.0" y="790.0" width="120.0" height="52.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="620.0" y="806.0" font-size="9" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">EXT-B — Port B device</text><text x="620.0" y="820.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">SSD · tethered phone ·</text><text x="620.0" y="831.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">USB cellular adapter</text><line x1="620.0" y1="790.0" x2="620.0" y2="796.0" stroke="#222" stroke-width="1.32"/><rect x="680.0" y="790.0" width="120.0" height="52.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" stroke-dasharray="6 3"/><text x="740.0" y="806.0" font-size="9" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">EXT-C — Port C host (Pro)</text><text x="740.0" y="820.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">USB4 host / PD source</text><text x="740.0" y="831.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">blanked on Base</text><line x1="740.0" y1="790.0" x2="740.0" y2="796.0" stroke="#222" stroke-width="1.32"/><rect x="840.0" y="790.0" width="120.0" height="52.0" rx="3" fill="#f7f7f7" stroke="#222" stroke-width="1.32" /><text x="900.0" y="806.0" font-size="9" text-anchor="middle" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">EXT-LAN — network</text><text x="900.0" y="820.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">5GBASE-T, hinged door</text><text x="900.0" y="831.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">IP54 closed</text><line x1="900.0" y1="790.0" x2="900.0" y2="796.0" stroke="#222" stroke-width="1.32"/></g><g id="L-CONN-POWER"><path d="M280.0,500.0 L430.0,500.0" fill="none" stroke="#111111" stroke-width="2.08" stroke-linejoin="round" stroke-linecap="round"/></g><g id="L-CONN-HS"><path d="M490.0,164.0 L490.0,250.0" fill="none" stroke="#1f4e9c" stroke-width="1.32" stroke-linejoin="round" stroke-linecap="round"/><path d="M500.0,720.0 L500.0,790.0" fill="none" stroke="#1f4e9c" stroke-width="1.32" stroke-linejoin="round" stroke-linecap="round"/><path d="M620.0,720.0 L620.0,790.0" fill="none" stroke="#1f4e9c" stroke-width="1.32" stroke-linejoin="round" stroke-linecap="round"/><path d="M740.0,720.0 L740.0,790.0" fill="none" stroke="#1f4e9c" stroke-width="1.32" stroke-linejoin="round" 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stroke-width="0.94"/><line x1="1419.0" y1="698.0" x2="1415.0" y2="704.0" stroke="#4c7c1c" stroke-width="0.94"/><path d="M1120.0,664.0 L1230.0,664.0" fill="none" stroke="#4c7c1c" stroke-width="1.13" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="3 3"/><path d="M1120.0,704.0 L1230.0,704.0" fill="none" stroke="#4c7c1c" stroke-width="1.13" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="3 3"/><path d="M1120.0,154.0 L1500.0,154.0 L1500.0,664.0 L1440.0,664.0" fill="none" stroke="#4c7c1c" stroke-width="1.13" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="3 3"/></g><g id="L-CONN-REF"><path d="M300.0,650.0 L430.0,650.0" fill="none" stroke="#777777" stroke-width="0.94" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="4 3"/></g><g id="L-CONN-MECH"><path d="M600.0,480.0 L560.0,480.0" fill="none" stroke="#444444" stroke-width="0.94" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="1 3"/><path d="M1120.0,321.0 L1230.0,326.0" fill="none" stroke="#444444" stroke-width="0.94" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="1 3"/><path d="M1120.0,425.0 L1230.0,425.0" fill="none" stroke="#444444" stroke-width="0.94" stroke-linejoin="round" stroke-linecap="round" stroke-dasharray="1 3"/></g><g id="L-ANNOTATION"><text x="60.0" y="62.0" font-size="12" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">SYSTEM INTERCONNECT — boards, modules, harnesses, chassis bonds and external ports (logical, NTS)</text><text x="820.0" y="290.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">ASM2812 switch · PI3DBS16412 + HCSL clock mux · ASM2464PD (Pro) · ASM3142 · RTL8126 + magnetics</text><text x="820.0" y="302.0" font-size="8.5" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">TPS25750 ×3 · TPS2121-class VBUS mux (Pro) · BQ25792 · bucks · TPM SLB9672 · nRF5340 EC + BLE chip antenna</text><text x="439.0" y="690.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">J13 SoC UART · J14 EC SWD (Tag-Connect) — debug, unpopulated at PVT</text><text x="1111.0" y="540.0" font-size="8" text-anchor="end" fill="#333" font-family="Helvetica, Arial, sans-serif">J15 / J16 spare PCIe Gen2 ×1 test headers (unpop.)</text><text x="556.0" y="484.0" font-size="8.5" text-anchor="end" fill="#444" font-family="Helvetica, Arial, sans-serif">W-10 mated on J1 / J2 (B2B)</text><path d="M600.0,644.0 L667.4,644.0 L675.4,652.0 L667.4,660.0 L600.0,660.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="604.0" y="655.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">PU-W-102 power</text><path d="M698.0,644.0 L786.6,644.0 L794.6,652.0 L786.6,660.0 L698.0,660.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="702.0" y="655.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">PU-W-103 EC signals</text><path d="M796.0,644.0 L884.6,644.0 L892.6,652.0 L884.6,660.0 L796.0,660.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="800.0" y="655.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">PU-W-104 CFe B path</text><text x="498.0" y="198.0" font-size="8.5" text-anchor="start" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">W-01 Samtec ADM6 / ADF6 80-pin, direct mate, stack 5–8 mm (height TBD)</text><text x="498.0" y="210.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">CFe B Gen3/Gen4 ×2 + REFCLK + sidebands · CFe A ×1 · 3× Gen3 ×1 · 3.3 V slots / logic · 1.8 V · EC signals</text><path d="M498.0,218.0 L603.5,218.0 L611.5,226.0 L603.5,234.0 L498.0,234.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="502.0" y="229.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">PU-W-201 pin allocation</text><text x="302.0" y="293.0" font-size="8.5" text-anchor="start" fill="#8a4b00" font-family="Helvetica, Arial, sans-serif">W-03 OLED FPC 30-pin</text><text x="302.0" y="312.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">SPI · VDD 3.3 · VCC 12 V</text><text x="302.0" y="353.0" font-size="8.5" text-anchor="start" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">W-04 flex 6-pin (proposed)</text><text x="302.0" y="372.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">BTN · ring LED · 3.3 V AON</text><text x="302.0" y="493.0" font-size="8.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">W-02 6-way pack harness</text><text x="302.0" y="511.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">PACK± · SMBus · NTC · PRES#</text><text x="302.0" y="536.0" font-size="8" text-anchor="start" fill="#4c7c1c" font-family="Helvetica, Arial, sans-serif">W-20 pack − bond, one point</text><path d="M60.0,551.0 L216.4,551.0 L224.4,559.0 L216.4,567.0 L60.0,567.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="64.0" y="562.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">PU-W-202 pack · PU-W-204 J12 pinout</text><text x="302.0" y="583.0" font-size="8.5" text-anchor="start" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">W-08 2 leads, termination TBD</text><text x="302.0" y="602.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">THERM_ALERT (OI-1)</text><text x="302.0" y="643.0" font-size="8.5" text-anchor="start" fill="#777" font-family="Helvetica, Arial, sans-serif">W-09 3-pin, unpopulated</text><text x="1175.0" y="108.0" font-size="8.5" text-anchor="middle" fill="#1b7a3a" font-family="Helvetica, Arial, sans-serif">W-07 LED_DATA</text><text x="1175.0" y="130.0" font-size="7.8" text-anchor="middle" fill="#333" font-family="Helvetica, Arial, sans-serif">on-RB LEDs / FPC alt. (TBD)</text><text x="1284.0" y="243.0" font-size="8" text-anchor="start" fill="#9c1f1f" font-family="Helvetica, Arial, sans-serif">W-05 MHF4 coax</text><text x="1284.0" y="254.0" font-size="7.8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">≈140–150 mm (est.)</text><text x="1396.0" y="243.0" font-size="8" text-anchor="start" fill="#9c1f1f" font-family="Helvetica, Arial, sans-serif">W-06 MHF4</text><text x="1396.0" y="254.0" font-size="7.8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">≈60 mm (est.)</text><text x="1284.0" y="286.0" font-size="7.8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">ANT0</text><text x="1396.0" y="286.0" font-size="7.8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">ANT1</text><text x="1175.0" y="314.0" font-size="8.5" text-anchor="middle" fill="#444" font-family="Helvetica, Arial, sans-serif">W-11 mated in J8</text><text x="1175.0" y="418.0" font-size="8.5" text-anchor="middle" fill="#444" font-family="Helvetica, Arial, sans-serif">W-12 mated in J9 (Pro)</text><text x="1175.0" y="657.0" font-size="8" text-anchor="middle" fill="#4c7c1c" font-family="Helvetica, Arial, sans-serif">W-17 8 bosses</text><text x="1175.0" y="697.0" font-size="8" text-anchor="middle" fill="#4c7c1c" font-family="Helvetica, Arial, sans-serif">W-19 brackets / frame</text><text x="1513.0" y="400.0" font-size="8" text-anchor="start" fill="#4c7c1c" font-family="Helvetica, Arial, sans-serif" transform="rotate(-90 1513.0 400.0)">W-18 RB GND via mounting rail + cage pins</text><text x="505.0" y="750.0" font-size="8.5" text-anchor="start" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">W-13</text><text x="505.0" y="761.0" font-size="7.8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">USB-C cable</text><text x="625.0" y="750.0" font-size="8.5" text-anchor="start" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">W-14</text><text x="625.0" y="761.0" font-size="7.8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">USB-C cable</text><text x="745.0" y="750.0" font-size="8.5" text-anchor="start" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">W-15</text><text x="745.0" y="761.0" font-size="7.8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">USB-C (USB4)</text><text x="905.0" y="750.0" font-size="8.5" text-anchor="start" fill="#1f4e9c" font-family="Helvetica, Arial, sans-serif">W-16</text><text x="905.0" y="761.0" font-size="7.8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">Cat 6A patch</text><path d="M1000.0,808.0 L1139.4,808.0 L1147.4,816.0 L1139.4,824.0 L1000.0,824.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="1004.0" y="819.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">PU-W-203 port and module wiring</text><path d="M1000.0,832.0 L1122.5,832.0 L1130.5,840.0 L1122.5,848.0 L1000.0,848.0 Z" fill="#fff" stroke="#333" stroke-width="0.68" stroke-linejoin="round" stroke-linecap="round"/><text x="1004.0" y="843.0" font-size="8" text-anchor="start" fill="#333" font-family="Helvetica, Arial, sans-serif">PU-W-204 peripheral pinouts</text><rect x="60.0" y="700.0" width="340.0" height="267.2" rx="0" fill="#fff" stroke="#222" stroke-width="0.68" /><text x="68.0" y="715.0" font-size="9.5" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif" font-weight="bold">Notes</text><text x="68.0" y="732.3" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">1. Baseline ADR v0.3 (2026-09-27). Logical interconnect only: block</text><text x="80.0" y="742.7" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">positions and line lengths carry no physical meaning; no cable length is</text><text x="80.0" y="753.1" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">measured.</text><text x="68.0" y="763.5" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">2. Dashed outlines = Pro-only population, reserved or TBD. Pro adds the NVMe</text><text x="80.0" y="773.9" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">in J9, Port C data (ASM2464PD) and Port C PD sink (TPS25750-C +</text><text x="80.0" y="784.3" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">TPS2121-class VBUS mux) on the same PCB; J6 receptacle is fitted on both</text><text x="80.0" y="794.7" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">SKUs and blanked on Base.</text><text x="68.0" y="805.1" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">3. Harness lengths (W-02, W-05, W-06) are estimates from the docs/08 layout.</text><text x="80.0" y="815.5" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">RB-to-MB mezzanine stack height and ADM6/ADF6 variant are set when docs/08</text><text x="80.0" y="825.9" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">fixes the spacing (09 §13).</text><text x="68.0" y="836.3" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">4. Conflicts carried to PU-W-000: OI-3 pack connector family / current per</text><text x="80.0" y="846.7" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">pin; OI-4 Hall sensor on RB (mezzanine pin 66) vs on the J11 flex; OI-10 SoM</text><text x="80.0" y="857.1" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">connector count (2 vs 3 B2B). Not applicable if board-down is chosen (D12).</text><text x="68.0" y="867.5" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">5. W-08 thermal switch: rating (48 °C vs 60 °C class, OI-1), location and</text><text x="80.0" y="877.9" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">interrupted circuit are fixed at EVT schematic release. J17 fan header stays</text><text x="80.0" y="888.3" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">unpopulated until the EVT-exit fan gate (D5).</text><text x="68.0" y="898.7" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">6. Chassis bonds W-17…W-20: 8 MB screw bosses on exposed L1 GND rings, RB</text><text x="80.0" y="909.1" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">rail + cage pins, connector brackets / RJ45 frame, pack − at one point near</text><text x="80.0" y="919.5" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">the charger (09 §6). Bare conversion-coated Mg lands; never stainless into</text><text x="80.0" y="929.9" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">Mg (D4).</text><text x="68.0" y="940.3" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">7. Detail sheets: PU-W-102 power, PU-W-103 EC signals, PU-W-104 CFe B</text><text x="80.0" y="950.7" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">mode-switch path, PU-W-201 mezzanine, PU-W-202 pack, PU-W-203 ports and</text><text x="80.0" y="961.1" font-size="8" text-anchor="start" fill="#111" font-family="Helvetica, Arial, sans-serif">modules, PU-W-204 pinouts, PU-W-301 schedule.</text></g></svg>