docs/05-power-budget.md
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# 05 — Power System, Budget & Tree **Derives from:** `00-architecture-decisions.md` (ADR) §2, §6. **Feeds:** `06-thermal.md`, `08-mechanical.md`, `10-bom.md`, `11-certification.md`.**Status:** Phase 1 baseline, revised to ADR **Baseline v0.3** (2026-09-27: Port C PD sink on the Pro SKU via a priority mux into the charger input — D7; Port B 3 A tether charge only with external PD present — D13; thermal-safety standby — D2; magnesium chassis cross-references — D4). v0.2 (same date) removed the built-in 5G cellular modem (ADR §14). Vendor figures marked "(verify)" must be confirmed against current datasheets before EVT schematic release. --- ## 1. Design goals | Goal | Target | Source ||---|---|---|| Airline carry-on without approval | ≤ 100 Wh pack | ADR §2 || Continuous heavy upload on battery | ≥ 4 h in the heaviest sustained modes (5GbE upload; USB-tethered phone charged at the 1.5 A default) | ADR §6.2 || Standby (SoC off, BLE reachable) | ≥ 3 weeks | ADR §6.2 || Charge and run simultaneously | Yes, from any USB-C PD source ≥ 45 W at full load on Port A; on the Pro SKU also from a Mac/PD source on Port C (typically 15 W: holds the battery in reader mode, §7.5) | ADR §2, §3.4, §6 || Never draw meaningful power from a phone | 0 mA sink when the attached source is a phone | Product spec || Never corrupt job state on power loss | Graceful pause + flush before battery cut-off | Product spec || Port B tether supply | 5 V at a user-set 0.5 / 1.5 / 3 A (default 1.5 A; **3 A only while external PD power is present on Port A or Port C, EC-enforced — on battery the cap is 1.5 A regardless of the setting**) to charge a tethered phone or power a USB LTE/5G adapter, without disturbing the SoM's 5 V rail | ADR §2, §3.5, §4.3, §13 item 14 (D13) | --- ## 2. Battery ### 2.1 Chemistry comparison | Criterion | Li-ion NMC 21700 cylindrical | Li-Po pouch (NMC/LCO) | LiFePO4 (cylindrical 26650 / pouch) ||---|---|---|---|| Gravimetric energy | 250–270 Wh/kg (cell), ~200 Wh/kg packed | 220–260 Wh/kg (cell), ~190 Wh/kg packed | 120–160 Wh/kg || Volumetric energy | ~700 Wh/L (cell), ~480 Wh/L packed (cylinder voids) | ~600 Wh/L (cell), ~500 Wh/L packed | ~300 Wh/L || Drop / crush robustness | Steel can; survives 1.2 m drop trivially; cell holder isolates | Soft; needs rigid frame, prone to edge damage, swelling over life | Steel can; very robust || Swelling over life | Negligible | 5–10 % thickness growth must be budgeted | Negligible || Cycle life (80 % capacity) | 500–800 (0.5 C, 100 % DoD); ~1,500 at 20–80 % window | 300–600 | 2,000–4,000 || UN 38.3 path | Cells pre-certified by vendor; pack test on our assembly | Custom cell → full cell + pack test, longer lead | Cells pre-certified || Nominal voltage per cell | 3.6 V | 3.7 V | 3.2 V || Cost (72 Wh class, 1 k) | ~$24 cells + $12 pack | ~$35 custom pouch + $12 pack, $8–15 k NRE | ~$30 cells + $12 pack || Fit to 38 mm thickness (ADR) | 21 mm dia. fits stacked in front of the main board | Better use of flat volume | 26 mm dia. is tight | **Decision: Li-ion NMC 21700 cylindrical, 2S2P.** LiFePO4 is rejected on energy density (a 72 Wh LiFePO4 pack would weigh ~560 g and not fit). Pouch cells give ~10 % better volume use but cost a custom-cell UN 38.3 program, swelling allowance, and worse drop behaviour; the cylindrical pack is the choice that survives 26 concrete drops without special framing. ### 2.2 Configuration options Cell basis: 21700, 5,000 mAh class, 3.6 V nominal → 18.0 Wh, 69 g, 21.4 × 70.5 mm (16.1 mL). | Config | Cells | Nominal V | Ah | Wh | Cell mass | Pack mass (+15 %) | Cell volume | Airline | Verdict ||---|---|---|---|---|---|---|---|---|---|| 3S1P | 3 | 10.8 | 5.0 | 54 | 207 g | ~240 g | 48 mL | OK | Too little runtime (3.4 h at 16.0 W) || **2S2P** | **4** | **7.2** | **10.0** | **72** | **276 g** | **~320 g** | **64 mL** | **OK** | **Baseline** || 3S2P | 6 | 10.8 | 10.0 | 108 | 414 g | ~475 g | 97 mL | **> 100 Wh — needs airline approval** | Rejected || 3S2P (4,500 mAh) | 6 | 10.8 | 9.0 | 97 | 414 g | ~475 g | 97 mL | OK (2.8 Wh margin) | Option "XL" — +155 g, +$30, ADR Q5 || 2S3P | 6 | 7.2 | 15.0 | 108 | 414 g | ~475 g | 97 mL | > 100 Wh | Rejected | Runtime scaling: 97 Wh option gives ×1.35 runtime (5.9 h on 5GbE vs 4.4 h; 5.5 h vs 4.1 h with a tethered phone charging at 1.5 A) for +155 g on an ~850 g device. Not recommended for the base SKU; a 6-cell pack would also lengthen the battery bay beyond the current 190 mm envelope. ### 2.3 Why 2S (7.2 V) rather than 3S (10.8 V) - Our rails are 5.0 V and 3.3 V (plus sub-1.8 V locals). From 2S (5.6–8.4 V) every rail is a simple buck with input/output ratio between 1.1:1 and 2.5:1 — the sweet spot for buck efficiency (91–94 %). From 3S (8.4–12.6 V) the 3.3 V rails run at 3.8:1 with ~2–3 % worse efficiency at our currents.- 2S at 8.4 V allows a 5 V buck-boost charger (BQ25792) to work from any PD source, including 5 V/3 A legacy adapters and 9 V phone chargers. 3S would need 12 V+ sources for buck-only charging or a boost stage.- The two 5 V bucks together (6 A SYS + 3 A PORT B, §3.3) draw ≤ 4.3 A from a 7.2 V bus at their combined 30.7 W peak — trace/connector currents stay < 5 A everywhere on the pack side.- Cell balancing is simpler with 2 groups than 3.- Cost: BQ40Z50-R2 gauge/protector supports 1–4S, no change. Downside accepted: at the 2S low end (5.6 V) the 5 V buck has only 0.6 V headroom; we use a low-Rds buck with 100 % duty capability and set the cell UVLO at 2.8 V (5.6 V pack) so the SoM never sees a brown-out. ### 2.4 Cell candidates Discharge requirement per string (2P → each cell sees half of pack current): worst case sustained 16.0 W battery draw (USB-tethered phone charged at the 1.5 A default; 14.9 W on 5GbE) ÷ 5.6 V = 2.9 A pack → 1.4 A per cell (0.29 C). The 3 A tether setting (24.5 W) is available only with external PD present (D13), so the pack never sees it as a sustained discharge. Peak (SoM 8 W + CFe B 5 W + Port B tether at 5 V/3 A = 15 W, coincident): ~28 W for ms → 5.0 A pack → 2.5 A per cell (0.5 C) — v0.1 with the modem's 12 W burst was ~40 W → 7.1 A → 3.6 A per cell. Charge 5 A pack → 2.5 A per cell (0.5 C). | Cell | Capacity | Max continuous discharge | Std charge | Mass | Cycle life (80 %) | Notes ||---|---|---|---|---|---|---|| Samsung INR21700-50E | 4,900 mAh | 9.8 A | 2.45 A (verify) | 69 g | ~500 | Broad availability; UN 38.3 on file || LG INR21700-M50LT | 5,000 mAh | 7.3 A (verify) | 1.45 A std, 2.5 A max (verify) | 68 g | ~500 | Best Wh; check 2.5 A fast-charge derating || Molicel INR21700-P45B | 4,500 mAh | 45 A | 4.5 A | 70 g | ~500 | Over-spec for us; excellent low-temp; use if −20 °C performance dominates || Samsung INR21700-50S | 5,000 mAh | 25 A (verify) | 2.5 A | 70 g | ~500 | Good middle ground | **Primary: Samsung INR21700-50E (or 50S); second source LG M50LT.** All exceed our continuous need (1.4 A per cell at the 1.5 A tether default) by ≥ 5× (M50LT) to ≥ 7× (50E); the choice is driven by availability, low-temperature capacity (see `06-thermal.md` §10), and the vendor's UN 38.3 documentation. Dual-sourcing requires the pack to be re-tested per cell type (UN 38.3 T1–T8) — budget both at DVT. ### 2.5 Pack construction - 4 cells in a PC+30 % GF cell holder (two halves, ultrasonically welded or screwed), 1.0 mm wall between cells, 2 mm to enclosure.- 0.15 × 8 mm pure-nickel strip, spot-welded, series/parallel bus formed to a 2-layer pack PCB (`09-pcb-architecture.md`) carrying BQ40Z50-R2 gauge/protector, BQ294xx secondary over-voltage protector, 10 A / 32 V chemical fuse (SEFUSE or Dexerials SFJ class) driven by the secondary protector, 2 × 10 k NTC (one per parallel group) glued to cell cans, and a 6-pin Molex Micro-Fit or JST GH pack connector (PACK+, PACK−, SMBus CLK/DAT, NTC, PRES#).- 2 mm PORON foam around the holder for drop isolation; fish paper / Kapton insulation over the strip layer.- Assembled and tested as a subassembly by the pack vendor; UN 38.3 and IEC 62133-2 are run on the pack, not the finished device (`11-certification.md`). Pack is non-user-removable but service-replaceable (4 screws, one connector). --- ## 3. Loads ### 3.1 Component power table (from ADR §6.1, reproduced verbatim) | Component | Off / power-gated | Idle | Typical active | Peak ||---|---|---|---|---|| RK3588 SoM (SoC+DDR+eMMC+PMIC) | 0 (standby: EC only) | 1.8 | 3.0 (≤ 10 MB/s hotspot/tethered upload) / 5.5 (5GbE TLS upload) | 8.0 || ASM2812 switch | 0 | 0.5 (ASPM) | 1.8 | 2.2 || PI3DBS16412 mux + clock mux | — | 0.05 | 0.05 | 0.05 || ASM2464PD USB4 bridge | 0 (powered only when Port C attached) | 0.5 | 2.0 | 2.5 || ASM3142 USB host ctrl | — | 0.1 | 0.8 | 1.0 || GL9755 / GL9750 / ASM1064 (each) | — | 0.1 | 0.4 / 0.3 / 0.6 | 0.7 || CFexpress B card | 0 (slot power-gated) | 0.6 | 3.0 (seq read) | 5.0 || CFexpress A card | 0 | 0.4 | 1.8 | 3.0 || SD UHS-II card | 0 | 0.1 | 0.8 | 1.2 || microSD card | 0 | 0.05 | 0.3 | 0.5 || CFast 2.0 card | 0 | 0.3 | 2.0 | 3.0 || RTL8126 5GbE | 0.2 (link down) | 0.7 (1G) / 1.2 (2.5G) | 1.9 (5GbE link) | 2.2 || MT7925 Wi-Fi 7 | 0.05 | 0.3 (STA idle) | 1.0 (TX at ≤ 10 MB/s) / 1.8 (TX at 80 MB/s) / 2.2 (AP+STA) | 2.5 || Port B VBUS to tethered phone / USB adapter (user-set limit) | 0 | — | 7.5 (5 V × 1.5 A) | 15 (5 V × 3 A, only with external PD present) || NVMe SSD (optional) | 0 | 0.3 | 4.0 (write) | 6.0 || EC nRF5340 + OLED + LED bar | 0.05 (BLE adv.) | 0.15 (OLED on) | 0.2 | 0.4 || TPM, sensors, misc | — | 0.1 | 0.1 | 0.1 || DC/DC conversion efficiency | — | 85 % (light) | 88 % | 90 % | Where these numbers come from: SoM figures are measured ranges on ROCK 5B / Core-3588J class boards under I/O-bound loads (verify on our SoM at PoC); MT7925 TX figures from module-vendor data for 2×2 at ~80 MB/s and for light duty at the ≤ 10 MB/s a phone's cellular uplink allows (verify at PoC against a real hotspot); ASMedia parts from reference-board measurements (verify — datasheets under NDA); cards from vendor spec sheets (CFe B "≤ 5 W peak" is a conservative bound below the CFA power class). The Port B VBUS row is not a PoppyUp load but power passed through to the phone or USB cellular adapter: the ceiling is the user's 0.5 / 1.5 / 3 A setting (Type-C Rp advertisement), the phone decides how much of it to draw, and 7.5 W assumes a phone below ~80 % SoC actually pulling the full 1.5 A. A USB LTE/5G adapter typically draws 2–5 W (verify per adapter). ### 3.2 Per-rail load table "Typ" = the heaviest *sustained* mode that loads that rail; "Peak" = simultaneous worst case for regulator sizing. | Rail | Consumers | Typ (W) | Typ (A) | Peak (W) | Peak (A) | Regulator rating ||---|---|---|---|---|---|---|| **5.0 V SYS** | SoM (5.5 typ / 8.0 pk), Port A source 5 V/1.5 A (7.5 W), OLED boost (0.15) | 5.7 | 1.1 | 15.7 | 3.1 | 6 A buck (2× headroom; Port A eFuse limits at 1.5 A) — see §3.3 || **5.0 V PORT B** | Port B VBUS only: tethered phone / USB cellular adapter / external SSD, user-set 0.5 / 1.5 / 3 A | 7.5 (1.5 A default) / 15 (3 A, PD present only) | 1.5 / 3.0 | 15 | 3.0 | 3 A buck, dedicated, + TPS2596 eFuse 3.3 A trip — see §3.3 || **3.3 V SLOTS** | CFe B, CFe A, SD, microSD, CFast (each behind an eFuse) | 3.0 (one card reading) / 7.9 (all reading) | 0.9 / 2.4 | 12.7 (all cards at peak) | 3.85 | 4 A buck, per-slot eFuse: CFe B 2.0 A, CFe A 1.2 A, CFast 1.2 A, SD 0.5 A, µSD 0.3 A || **3.3 V LOGIC** | ASM2812 (1.8), RTL8126 (1.9), MT7925 (2.2 pk), ASM3142 (0.8), GL9755+GL9750+ASM1064 (1.3), ASM2464PD (2.0, Pro), PI3DBS16412, TPM, clock gen | 5.5 | 1.7 | 10.2 | 3.1 | **4 A** buck (ADR §6: 4 A, Pro-SKU peak ≈ 3.1 A) || **1.8 / 1.2 / 1.05 V locals** | ASM2812 core (1.05 V ~1 A), ASM3142 core, ASM2464PD core (1.05 V ~1.2 A), RTL8126 core (1.05 V), GL97xx I/O 1.8 V | included in the 3.3 V LOGIC totals above (locals fed from 3.3 V LOGIC) | — | — | — | 3 A local bucks / 500 mA LDOs || **NVMe 3.3 V (Pro)** | M.2 M-key SSD | 4.0 | 1.2 | 6.0 | 1.8 | Fed from 3.3 V SLOTS rail via 2.5 A eFuse (rail rating rises to 6 A on Pro SKU) or separate 3 A buck — decision at EVT || **3.3 V AON (EC)** | nRF5340, Hall sensor, fuel-gauge SMBus pull-ups, RTC, LED bar (0.25 pk) | 0.05 | 0.015 | 0.4 | 0.12 | 150–200 mA LDO from VBAT, always on || **VSYS (6–8.4 V)** | All bucks above; charger output | 14.1 (tethered phone at 1.5 A) / 13.1 (5GbE) | 2.0 (at 7.2 V) | 28 (coincident, ms) | 5.0 (at 5.6 V) | BQ25792 system path (7 A) | Cross-check against ADR §6.2 heaviest in-device mode (5GbE upload, Σ 13.1 W): 5 V SYS 5.5 (SoM) + slots 3.0 + logic (1.8 + 1.9 + 0.3 + 0.1 + 0.3 + 0.05 + 0.1 = 4.55) + AON 0.15 = 13.2 W ✓ (rounding). Heaviest battery-draw mode (USB-tethered phone charged at 1.5 A, Σ 14.1 W): 5 V SYS 3.0 (SoM) + 5 V PORT B 7.5 + slots 1.0 + logic (1.0 + 0.2 + 0.05 + 0.8 + 0.3 + 0.05 + 0.1 = 2.5) + AON 0.15 = 14.15 W ✓. ### 3.3 5 V rail sizing and Port B VBUS sourcing (v0.2 decision) In v0.1 Port B was an SSD port: its 5 V/3 A rating was a Type-C formality (an external SSD draws < 1 A) and it hung off the 5.0 V/6 A SYS buck. In v0.2 Port B charges a tethered phone at the user-set 0.5 / 1.5 / 3 A for the length of an upload — a *sustained* load equal to or larger than the SoM's, not a rating (the 3 A step exists only with external PD present, D13, but the buck still has to deliver it then, so the sizing case is unchanged). Sizing the single 6 A rail for it: peak = SoM 8.0 + Port B 15 + Port A 7.5 + OLED 0.15 = 30.7 W → **6.1 A, above the 6 A rating**; sustained worst case (3 A tether + SoM at 5.5 W on Ethernet + Port A phone top-up) = 5.6 A → 93 % of rating, ~2 W lost in one buck at ~90 % from 7.2 V. Beyond the arithmetic, a phone steps its charge current in 0.5–1 A increments (thermal and SoC-dependent) and a shorted Port B cable would pull the SoM's ±3 % rail down until the eFuse trips. **Decision: Port B VBUS comes from its own 5.0 V/3 A buck ("5.0 V PORT B", TPS62933 class, §5) through the TPS2596 eFuse; the 5.0 V/6 A SYS buck feeds only the SoM, the Port A 1.5 A source and the OLED boost.** Reasoning: (1) 5 V SYS peak drops to 15.7 W / 3.1 A — the 6 A part keeps 2× headroom (a 4 A part becomes an EVT cost option); (2) the phone's charge-current steps and any Port B cable fault are isolated from the SoM rail; (3) the EC can enable, current-limit (Rp advertisement 0.5 / 1.5 / 3 A) or cut tether charging independently for the low-battery ladder (§10.1) and thermal policy (`06-thermal.md` §7) without touching the SoM; (4) the buck re-uses the board area and layout slot of the deleted v0.1 modem buck — one 6 A buck deleted, one 3 A buck added, net BOM still down. A current-limited load switch off the SYS rail was rejected: it solves neither the 6.1 A budget nor the transient coupling. ADR §6 carries the dedicated Port B buck since v0.3 (§13 item 4 resolved). The 5 V rails are otherwise unchanged in v0.3. --- ## 4. Power tree ```mermaidflowchart LR subgraph IN[Inputs] PDA[Port A USB-C\nPD sink 5–20 V ≤ 100 W\nPD source 5 V/1.5 A] PDC[Port C USB-C - Pro only\nPD sink 5–20 V ≤ 3.25 A\nMac typ. 15 W] end PDA --> TPS[TPS25750 - Port A\nUSB-PD controller] PDC --> TPSC[TPS25750 - Port C sink\nPro only, depop on Base] TPS -- I2C --> BQ TPSC -- I2C --> EC PDA -- VBUS --> PMUX[TPS2121-class priority mux\nPort A priority, break-before-make\nPro only; Base: Port A straight through] PDC -- VBUS --> PMUX PMUX -- VIN --> BQ[BQ25792\nbuck-boost NVDC charger\n1–4S, 5 A chg, 7 A sys] subgraph PACK[Battery pack subassembly] CELLS[4x 21700 2S2P\n7.2 V 10 Ah 72 Wh] GAUGE[BQ40Z50-R2\ngauge + protector] SEC[BQ294xx 2nd protector\n+ chemical fuse] CELLS --> GAUGE --> SEC end SEC -- PACK+ --> BQ GAUGE -- SMBus --> EC BQ -- VSYS 6–8.4 V --> B5[5.0 V SYS / 6 A buck\nTPS56637] BQ -- VSYS --> BPB[5.0 V PORT B / 3 A buck\nTPS62933] BQ -- VSYS --> BS[3.3 V SLOTS / 4 A buck\nLMR33640] BQ -- VSYS --> BL[3.3 V LOGIC / 4 A buck\nLMR33640] SEC -- VBAT --> AON[3.3 V AON LDO\nTPS7A16 150 mA] AON --> EC[nRF5340 EC\nHall, RTC, LED bar, OLED logic] B5 --> SOM[RK3588 SoM\nown PMIC RK806] BPB --> EFB[eFuse 3.3 A trip\nTPS2596] --> PB[Port B VBUS 5 V\nSSD / tethered phone / USB cellular adapter\nRp 0.5 / 1.5 / 3 A set by EC] B5 --> EFA[eFuse 1.5 A] --> PAS[Port A VBUS source\nphone top-up] B5 --> OLEDB[OLED VCC boost 12 V] BS --> EF1[eFuse 2.0 A] --> CFB[CFe B slot] BS --> EF2[eFuse 1.2 A] --> CFA[CFe A slot] BS --> EF3[eFuse 1.2 A] --> CFAST[CFast slot] BS --> EF4[eFuse 0.5 A] --> SD[SD UHS-II slot] BS --> EF5[eFuse 0.3 A] --> USD[microSD slot] BS --> EF6[eFuse 2.5 A - Pro] --> NVME[M.2 NVMe] BL --> SW[ASM2812 switch\n+1.05 V local buck TPS62823] BL --> ETH[RTL8126 5GbE\n+1.05 V local] BL --> WIFI[MT7925 M.2 Key-E] BL --> USBH[ASM3142 xHCI\n+1.05 V local] BL --> RDR[GL9755 / GL9750 / ASM1064\n+1.8 V LDO] BL --> U4[ASM2464PD - Pro\n+1.05 V local, load-switched] BL --> MUX[PI3DBS16412 + REFCLK mux] BL --> TPM[TPM SLB9672] EC -- EN/PG --> B5 EC -- EN + Rp select --> BPB EC -- EN --> BS EC -- EN --> BL``` Sequencing (EC-controlled): AON always → on power-on: LOGIC → SLOTS (eFuses off) → 5 V SYS (SoM boots) → 5 V PORT B only on Port B attach detection (the EC sets the CC Rp advertisement to the user's 0.5 / 1.5 A tether-charge setting *before* VBUS is applied — 3 A only if `PD_PRESENT` is already true, §7.4) → slot eFuses as cards are detected. Power-down reverses; slot eFuses drop only after the SoC confirms unmount or after the EC's hard-cut timer expires. PD-source attach (Pro: either port): Port A attach → TPS25750-A negotiates → the priority mux selects Port A (it always wins) → BQ25792 input current limit set from the contract → `PD_PRESENT` → EC may raise the Port B Rp to 3 A if so set. Port C attach with no Port A source → EC enables the Port C TPS25750 sink (and the ASM2464PD path, ADR §4.2) → sink contract (typically 5 V/3 A from a Mac, up to 20 V/3.25 A from a PD source) → mux passes Port C VBUS to the charger → `PD_PRESENT`. Port A attach while Port C is feeding: **break-before-make** — the mux drops Port C VBUS, the BQ25792 rides the ~ms gap in supplement mode from the battery (bulk caps, §10.2), then Port A VBUS is applied and the input limit re-programmed. Port A detach with Port C still attached: reverse (Port C contract re-established; proposed, §13 item 12: if the remaining contract is too small to carry the 3 A Port B step — e.g. a 15 W Mac — the EC drops the Port B Rp back to 1.5 A before the mux switches; verify against the mux's switchover timing). Base SKU: the Port C PD controller and mux are depopulated; Port A VBUS goes straight to the charger input. --- ## 5. Rail-by-rail regulator selection | Rail | Part (primary) | Alternate | Key specs | Why separate ||---|---|---|---|---|| Charger / VSYS | **TI BQ25792** | TI BQ25798 (adds MPPT — not needed); Renesas RAA489xxx class | 3.6–24 V in, 1–4S, 5 A charge, 7 A system, buck-boost, NVDC, I²C, dual-input capable, ship/shutdown modes | NVDC gives seamless supplement mode: when source < load, the battery tops up the difference without glitch || USB-PD (Port A) | **TI TPS25750** | TI TPS65988 (dual-port, if Ports A/B PD are merged into one controller) | PD 3.0, sink/source/DRP, I²C, pre-configured for BQ2579x, PR_Swap support | Firmware-configurable from EC; supports the "0 mA from phone" rule || USB-PD sink (Port C, Pro only — D7) | **TI TPS25750** (third instance, sink-only configuration) + **TPS2121-class priority power mux** (TI TPS2121 rated 2.7–22 V / 4.5 A class, verify at 20 V / 3.25 A = 65 W; alternate: back-to-back ideal-diode ORing with LM74700-class controllers) | TI TPS65987D if ASMedia's reference design needs a companion for the USB4 alt-mode/PD data path (verify) | PD 3.0 sink 5–20 V ≤ 3.25 A; mux ORs Port C VBUS with Port A VBUS into the BQ25792 input, **Port A priority, break-before-make**, reverse blocking both ways; depopulated on Base with the ASM2464PD (VBUS pin to attach detection only) | Lets a Mac (typically 15 W, 5 V/3 A) or a PD source on Port C power the device during long USB4 reader sessions without a second charger; the ASM2464PD itself stays on 3.3 V LOGIC via load switch || 5.0 V SYS / 6 A | **TI TPS56637** (4.5–28 V in, 6 A, 500 kHz–2.2 MHz) (verify) | TI TPS566238, MPS MPQ8633 | 100 % duty capable, ~93 % at 2 A, ~91 % at 5 A from 7.2 V | SoM demands clean ±3 % 5 V; with Port B on its own buck the 6 A rating is 2× the 3.1 A peak (SoM 8 W + Port A 1.5 A source) — a 4 A part is an EVT cost option || 5.0 V PORT B / 3 A | **TI TPS62933** (3.8–30 V in, 3 A) (verify) | MPS MP2315, TI TPS563300 | Feeds only the Port B receptacle through the TPS2596 eFuse; ~92 % at 1.5 A from 7.2 V (~0.4 W loss at the default, ~0.8 W at 3 A); EN from EC | Isolates the SoM's 5 V from the tethered phone's charge-current steps and from Port B cable faults; lets the EC drop or cut tether charging (low battery, thermal) without touching the SoM rail; keeps the 6 A SYS buck at ≤ 3.1 A peak. Re-uses the board area of the deleted v0.1 modem buck (§3.3) || 3.3 V SLOTS / 4 A | **TI LMR33640** (3.8–36 V, 4 A) (verify) | TI TPS62933 (3 A — insufficient), MPS MP2315 | Slot hot-insert inrush limited by eFuses (soft-start 1 ms) so rail sees ≤ 0.5 A/µs | Card power must be cut cleanly per-slot during mode switch and on fault without disturbing logic || 3.3 V LOGIC / 4 A | **TI LMR33640** | TI TPS56637 (6 A) if Pro SKU load growth demands | Feeds switch, PHY, Wi-Fi, readers, bridge | Always on while SoC on; RF module (Wi-Fi) rail needs < 20 mVpp ripple — add LC π-filter at M.2 E-key || 1.05 V locals (×3–4) | **TI TPS62823** (2.4–5.5 V in, 3 A, 2.2 MHz) | TI TPS62865 | One per ASMedia/Realtek core to keep return currents local | Core rails are high-current, low-voltage; running them across the board loses regulation || 1.8 V readers | **TI TLV75518** 500 mA LDO (from 3.3 V) | TLV755P | GL97xx I/O | Small, low noise || 3.3 V AON | **TI TPS7A16** (3–60 V in, 100 mA, 5 µA Iq) or **TPS7A4700**-class if > 100 mA needed (verify LED bar peak ≤ 100 mA else use LED driver from 5 V SYS) | Microchip MCP1804 (150 mA, 28 V) | Directly from VBAT 5.6–8.4 V, always on | EC must live when everything else is off; Iq sets standby life || OLED VCC (12 V) | Small boost in OLED module or TPS61041 | — | ~30 mA | Only when display on | Efficiency assumptions used in ADR §6.2: 88 % system average at typical loads (buck 92 % × distribution/eFuse/charger-path losses 96 %). Light-load (idle) 85 % because switchers are in PFM. These are conservative; measured values at EVT will refine the runtime table. --- ## 6. Per-mode budget (ledgers) Method: sum the component table entries for the state of each component in that mode → Σ loads; battery draw = Σ ÷ 0.88; runtime = 65 Wh ÷ battery draw. "Reader ctrl idle" = GL9755 + GL9750 + ASM1064 + ASM3142 in D3/ASPM = 4 × 0.1 = 0.4 W (0.3 W in the tethered mode, where the ASM3142 is active and counted separately). ### 6.1 Ethernet upload, 5GbE, CFe B at ~500 MB/s (ADR: Σ 13.1 W / 14.9 W / 4.4 h)| Item | W ||---|---|| SoM (TLS + xxHash/SHA at 500 MB/s) | 5.5 || ASM2812 active | 1.8 || CFe B card sequential read | 3.0 || RTL8126 at 5GbE link | 1.9 || MT7925 STA idle (associated, fallback link) | 0.3 || Reader ctrl idle | 0.4 || EC + OLED | 0.15 || Mux + TPM + misc | 0.1 || **Σ** | **13.15 → 13.1** || Battery draw ÷ 0.88 | 14.9 || Runtime 65 ÷ 14.9 | **4.4 h** | ### 6.2 Ethernet upload, 1GbE venue (~110 MB/s) (ADR: 9.2 / 10.5 / 6.2 h)| Item | W ||---|---|| SoM (light TLS, mostly waiting on the link) | 4.0 || ASM2812 (partial link activity) | 1.5 || CFe B card (bursty read, ~2/3 idle) | 2.0 || RTL8126 at 1G | 0.7 || Wi-Fi STA idle | 0.3 || Reader ctrl idle | 0.4 || EC 0.15 + misc 0.15 | 0.3 || **Σ** | **9.2** || Battery draw ÷ 0.88 | 10.5 || Runtime 65 ÷ 10.5 | **6.2 h** | ### 6.3 Wi-Fi upload via phone hotspot, ~10 MB/s (ADR: 6.9 / 7.8 / 8.3 h)The phone's cellular uplink (2.5–10 MB/s) is the bottleneck; the phone runs on its own battery and its cellular PA heat is the phone's.| Item | W ||---|---|| SoM (mostly waiting on the link) | 3.0 || ASM2812 (mostly ASPM) | 1.0 || CFe B card (near idle) | 1.0 || MT7925 TX, light duty (≤ 10 MB/s) | 1.0 || RTL8126 link down | 0.2 || Reader ctrl idle | 0.4 || EC + misc | 0.25 || **Σ** | **6.85 → 6.9** || Battery draw ÷ 0.88 | 7.8 || Runtime 65 ÷ 7.8 | **8.3 h** | This is the most runtime-efficient upload mode PoppyUp has (ADR §6.2). ### 6.4 Upload via USB-tethered phone on Port B, ~10 MB/s, phone charged at 5 V/1.5 A (ADR: 14.1 / 16.0 / 4.1 h)| Item | W ||---|---|| SoM | 3.0 || ASM2812 (mostly ASPM) | 1.0 || CFe B card (near idle) | 1.0 || ASM3142 active (USB NCM / `ipheth` traffic to the phone) | 0.8 || Reader ctrl idle (GL9755 + GL9750 + ASM1064; ASM3142 counted above) | 0.3 || MT7925 off | 0.05 || RTL8126 link down | 0.2 || EC + misc | 0.25 || Port B VBUS to the phone (5 V × 1.5 A, through the 5 V PORT B buck) | 7.5 || **Σ** | **14.1** || Battery draw ÷ 0.88 | 16.0 || Runtime 65 ÷ 16.0 | **4.1 h** | The 7.5 W is delivered to the phone, not dissipated in PoppyUp (only the Port B buck's ~5 % loss is our heat — `06-thermal.md` §2). Sensitivity to the tether-charge setting: **0.5 A** (2.5 W) → Σ 9.1 → 10.3 W → **6.3 h**. **The 3 A setting is a mains/PD-only case (D13, ADR §4.3): the EC advertises 3 A on Port B only while a PD source is present on Port A (or Port C on Pro), so it never appears in a battery-runtime table** — on battery the cap is 1.5 A regardless of the setting (the v0.2 "2.7 h at 3 A" battery case is withdrawn). With a PD source present the extra 7.5 W comes from the source, not the pack (§7.1). The same ledger with a USB LTE/5G adapter in place of the phone (2–5 W typical, verify) gives Σ 8.6–11.6 W → 9.8–13.2 W → 6.7–4.9 h. ### 6.5 Wi-Fi upload (~80 MB/s) (ADR: 8.9 / 10.1 / 6.5 h)| Item | W ||---|---|| SoM | 3.5 || ASM2812 | 1.2 || CFe B card | 1.5 || MT7925 TX at 80 MB/s | 1.8 || Ethernet link-down | 0.2 || Reader ctrl idle | 0.4 || EC + misc | 0.25 || **Σ** | **8.85 → 8.9** || Battery draw ÷ 0.88 | 10.1 || Runtime 65 ÷ 10.1 | **6.5 h** (6.46 on the unrounded 10.06 W) | ### 6.6 Host mode, USB4 path, CFe B → Mac at ~3 GB/s (ADR: 9.0 / 10.2 / 6.4 h)| Item | W ||---|---|| SoM (idle; not in the data path) | 1.8 || ASM2812 ASPM | 0.5 || ASM2464PD active | 2.0 || CFe B card at full Gen4 ×2 rate | 4.0 || PI3DBS16412 | 0.05 || Reader ctrl idle | 0.4 || EC + misc | 0.25 || **Σ** | **9.0** || Battery draw | 10.2 || Runtime | **6.4 h** on battery; **indefinite with a Mac or PD source on Port C (Pro, §7.5)** — a 15 W Mac covers the 10.2 W draw with ~4 W to spare | Note: this ledger assumes the Wi-Fi radio is off (0.05 W) and Ethernet link-down (0.2 W, absorbed in the rounding), not "STA associated" (0.3 W) — if the user keeps Wi-Fi associated add 0.3 W. If other slots are simultaneously uploading (allowed by ADR §4.2 Path 1), add the relevant 6.1–6.5 ledger minus the shared SoM/switch idle — the two activities together can approach ~17.5 W Σ (ADR §6.2 "worst combined": ~20 W draw, 3.3 h on battery; on Pro the Mac's 15 W on Port C reduces the net pack draw to ~6 W → ~11 h, §7.5). ### 6.7 Host mode, gadget path → iPhone at ~400 MB/s (ADR: 7.7 / 8.7 / 7.5 h)| Item | W ||---|---|| SoM (UAS gadget, block I/O at 400 MB/s) | 3.5 || ASM2812 | 1.5 || Card (CFe B or SD, average) | 2.0 || Reader ctrl idle | 0.4 || EC + misc | 0.25 || **Σ** | **7.65 → 7.7** || Battery draw | 8.7 || Runtime | **7.5 h** | (Wi-Fi assumed off during phone-reader mode; uploads are paused per spec, so there is nothing for a radio to do. If the user keeps Wi-Fi associated add 0.3 W → Σ 7.95 → 8.0 W, 9.0 W draw, 7.2 h.) ### 6.8 Idle awake (Wi-Fi associated, OLED on, cards inserted, waiting for link) (ADR: 3.3 / 3.75 / 17 h)| Item | W ||---|---|| SoM idle | 1.8 || ASM2812 ASPM | 0.5 || Wi-Fi STA idle 0.3 + Ethernet link down 0.2 | 0.5 || Reader ctrl idle (2 slots occupied, 2 controllers in D3cold) | 0.25 || EC + OLED | 0.15 || Misc | 0.1 || **Σ** | **3.3** || Battery draw ÷ 0.85 (light load efficiency) | 3.9 (ADR uses ÷ 0.88 → 3.75) || Runtime | **16–17 h** | Firmware target: drop "idle awake" below 3 W by putting the SoC into a low-frequency idle governor and the switch ports into L1.2; a further "idle-to-standby after 10 min without link and without cards" policy is the bigger win. ### 6.9 Standby (SoC off, EC + BLE advertising, OLED off) (ADR: 0.09 / 0.1 / ~600 h)| Item | W ||---|---|| nRF5340 BLE advertising at 1 s interval + Hall/RTC | 0.05 || BQ40Z50 + BQ25792 ship-mode quiescent + AON LDO Iq | 0.03 || Leakage (eFuses off, bucks disabled, mux) | 0.01 || **Σ** | **0.09 → 0.1 W** | Life: 65 Wh ÷ 0.1 W = 650 h = 27 days. Cell self-discharge ≈ 2 %/month of 72 Wh ≈ 1.4 Wh/month ≈ 0.002 W — negligible next to the EC load. With gauge learning error and a 10 % reserve for a clean boot, **quoted standby: ~3 weeks**. If the pack is left at 100 % SoC in storage, the EC should stop BLE advertising after 7 days of no interaction (drops to ~0.04 W, > 8 weeks). ### 6.10 Quick copy CFe B → NVMe (Pro SKU) (ADR: 13.0 / 14.8 / 4.4 h)| Item | W ||---|---|| SoM (block copy at ~1.6 GB/s, no TLS) | 3.5 || ASM2812 (both ports saturated) | 1.8 || CFe B read | 3.0 || NVMe write | 4.0 || Reader ctrl idle 0.4 + EC 0.15 + misc 0.1 | 0.65 || **Σ** | **12.95 → 13.0** || Battery draw | 14.8 || Runtime | **4.4 h** (a 512 GB copy takes ~5.5 min ≈ 1.4 Wh, i.e. ~2 % of the pack) | ### 6.11 Sensitivity - Wi-Fi TX power ±30 % in hotspot mode (1.0 → 0.7 / 1.3 W): Σ 6.55 / 7.15 W → battery 7.4 / 8.1 W → runtime **8.7 h / 8.0 h** (±0.35 h, ±4 %). The MT7925 light-duty TX figure is the least-characterised number in the table (it depends on how often the module can drop into power save between the phone's ~10 MB/s worth of frames); measured at PoC month 1 against a real phone hotspot.- Port B tether charge current 0.5 / 1.5 A (2.5 / 7.5 W to the phone): Σ 9.1 / 14.1 W → battery 10.3 / 16.0 W → runtime **6.3 / 4.1 h**. This is the largest single lever on field runtime and it is a user setting, not an uncertainty, so the app shows the runtime effect of each setting and the low-battery ladder (§10.1) steps it down. The 3 A step (15 W to the phone, Σ 21.6 W) is not a battery case: it is EC-enforced to be available only with external PD present (D13), where the source carries it.- SoM ±1 W in the 5GbE mode (Σ 12.1 / 14.1 W → 13.8 / 16.0 W): runtime 4.7 h / 4.1 h.- Efficiency 88 → 85 %: all runtimes −3.5 %.- Usable capacity 90 → 85 % (cold, aged pack): −5.5 %.- Combined pessimistic case for the heaviest realistic sustained in-device mode (5GbE upload, 85 % efficiency, 85 % usable): 13.1 W ÷ 0.85 = 15.4 W; 72 Wh × 0.85 = 61.2 Wh ÷ 15.4 W = **4.0 h** — the 4 h goal is met with no margin (v0.1's 4.3 h was against the modem's poor-signal mode). Two mitigations: a 5GbE upload is in practice a burst (a 512 GB card in ~17 min ≈ 4.3 Wh, 7 % of the pack), not a 4 h sustained mode; and the same pessimism applied to the tethered mode at the 1.5 A default gives 14.1 ÷ 0.85 = 16.6 W → 61.2 ÷ 16.6 = 3.7 h, which the 15 % step of the low-battery ladder (tether charge → 0.5 A) partly recovers. --- ## 7. USB-C PD input and port power behaviour ### 7.1 Sink (Port A; Port C on Pro through the priority mux, §7.5)- Advertised sink PDOs (both sink controllers): 5 V/3 A, 9 V/3 A, 15 V/3 A, 20 V/3.25 A (65 W), plus PPS 5–21 V if offered. Preferred request: **20 V/3.25 A**. Accepts up to 100 W contracts but the BQ25792 input current limit is set to 3.3 A at 20 V — extra source capability is unused.- Input to BQ25792 VBUS (max 24 V abs), on Pro via the TPS2121-class priority mux that ORs Port A and Port C VBUS (Port A wins; break-before-make; ≤ 3.25 A, verify the mux rating at 20 V/65 W). VBUS eFuse/OVP at 22 V (TPS25750 integrated protection + external TVS) on each sink port. Behaviour by source: | Source | Contract | Input power after cable/charger losses (×0.94) | System load (battery-draw figure of the mode; 5GbE upload unless stated; tethered phone at 1.5 A is 16.0 W) | Net to battery | Result ||---|---|---|---|---|---|| 5 V/2.4 A legacy (12 W) | 5 V, BC1.2 | 11.3 W | 14.9 W | −3.6 W | Runs indefinitely? No — battery drains at 3.6 W (18 h). Charges only when idle (≈ 7 W → 0→100 % in ~10 h) || 18 W phone charger | 9 V/2 A | 17 W | 14.9 W | +2.1 W | Holds level under upload; charges idle at ~13 W (5.5 h) || 30 W | 20 V/1.5 A | 28 W | 14.9 W | +13.1 W | Charges under load in ~5.5 h; idle 2.8 h || 45 W | 20 V/2.25 A | 42 W | 14.9 W | +27 W | Charges under load in ~2.7 h; idle full 5 A (2.3 h) || **65 W** | **20 V/3.25 A** | **61 W** | **14.9 W** | **+42 W (5 A cap)** | **Full-rate charge while uploading: 0→80 % 1.6 h, 100 % 2.3 h** || 100 W | 20 V/5 A | 61 W (input-limited) | — | — | Same as 65 W || **Port C, Mac 15 W (5 V/3 A), USB4 reader mode (Pro, §7.5)** | 5 V/3 A (Mac's default offer) | 14.1 W | 10.2 W (USB4 reader, radios asleep) | **≈ +4 W** | **Battery held / slowly charged during a reader session (0→100 % would take ~16 h at +4 W — "held" in practice); Note that `PD_PRESENT` is literally true here, but a 15 W contract cannot also carry 15 W to a phone on Port B — proposed: enable the 3 A step only for contracts ≥ 45 W (§13 item 12). A 65 W Mac/PD source on Port C behaves like the 65 W row (full-rate charge)** | NVDC "run while charging": the system rail (VSYS) is fed from the input when present; the charger delivers min(available, 5 A) to the battery; if the load exceeds the input, the battery supplements automatically (BQ25792 supplement mode) — no user-visible transition. Supplement mode is also what covers the ~ms break-before-make gap when the priority mux swaps Port C for Port A (Pro, §4 sequencing). ### 7.2 Phone rule (0 mA)When Port A is attached to a device that identifies as a phone/tablet (USB PD Discover Identity VDM product type, or a source offering only 5 V ≤ 1.5 A with a DRP toggle typical of phones), TPS25750 is configured by the EC to **not enter a sink contract and keep the charger's input FET off** (BQ25792 `EN_HIZ`). Measured draw from the phone: only the CC pull-down (µA) and USB 2.0/3.0 termination — < 5 mA. Apple's iPhone supplies 4.5 W to accessories; we take none of it. Optional: after a 10 s stable attach, the EC may request **PR_Swap** to become Source at 5 V/1.5 A (7.5 W) to top up the phone ("phone top-up" setting, default off; battery must be > 30 %). Data roles are unchanged (we remain UFP). ### 7.3 Mac / PC ruleDefault: accept sink contracts ≥ 15 W from a host that is not a phone (Macs offer 15 W from their ports; a USB4 Mac can offer more). Applies on Port A (all SKUs) and, on Pro, on Port C through the priority mux (§7.5) — a Mac on Port C keeps the battery level for the whole reader session. Setting "Never draw from computers" forces 0 mA on both ports. ### 7.4 Port B ("SSD / TETHER" host)5 V source from the dedicated 5.0 V PORT B 3 A buck (§3.3, §5) via TPS2596 eFuse with 3.3 A trip and 1 ms soft-start; no PD — legacy Type-C current advertisement on CC (Rp), set by the EC to the user's tether-charge setting: Default USB (0.5 A) / 1.5 A / 3.0 A, **default 1.5 A** (ADR §13 item 14). **3.0 A is advertised only while `PD_PRESENT` is true (a PD source on Port A, or on Port C on the Pro SKU) — EC-enforced, D13; on battery the Rp is capped at 1.5 A regardless of the user's setting**, so the 3 A step is a mains/PD case and never a battery-runtime case (§6.4, §6.11). The EC re-advertises Rp when the PD source arrives or leaves (a Type-C sink must follow the new Rp; the phone's charge current steps down within ~ms and the tether link is not affected). An external SSD draws < 1 A and needs no special advertisement. A tethered iPhone/Android phone or a USB LTE/5G adapter enumerates as a USB network-class device on the ASM3142 host (ADR §4.3) and is charged/powered from VBUS at whatever it draws up to the advertised current. VBUS is applied only on attach detection (Rp set first, §4), removed on detach, stepped down or removed by the low-battery ladder (§10.1) and stepped down on thermal request (`06-thermal.md` §7). Reverse-current blocking by the eFuse. Not a sink — Port B is a fixed DFP/source; a DRP phone that offers to source is refused. ### 7.5 Port C (USB4 + PD sink, Pro SKU only — D7)- **Data:** USB4 device (ASM2464PD, powered from 3.3 V LOGIC via load switch, enabled by attach detection; ~2 W in use). Read-only by default (ADR §4.2, D8).- **Power (new in v0.3):** a third **TPS25750** configured as a PD *sink* on Port C, and a **TPS2121-class priority power mux** that ORs Port C VBUS with Port A VBUS into the single BQ25792 charger input. **Port A has priority; break-before-make; 5–20 V, ≤ 3.25 A (verify the mux current/voltage rating at 20 V / 65 W and its reverse-blocking in both directions)**. The EC owns the Port C controller over I²C and applies the same phone rule (§7.2: 0 mA from an iPhone 15/16/17 Pro that lands on Port C) and the same "Never draw from computers" setting (§7.3).- **What a Mac gives:** typically 15 W (5 V/3 A) from its Type-C/Thunderbolt ports. In USB4 reader mode (10.2 W draw, §6.6) that leaves **≈ +4 W net** after cable/charger losses: the battery is held or very slowly charged for the length of the reader session — the "indefinite" runtime entry in ADR §6.2. With a 65 W Mac charger or any ≥ 45 W PD source on Port C the device fast-charges as in the §7.1 table. With uploads running on other slots at the same time (worst combined ~20 W draw) the pack still supplies ~6 W net.- **Base SKU:** the Port C TPS25750, the mux and the ASM2464PD are depopulated (same PCB); the Port C receptacle is fitted and blanked, and its VBUS pin goes only to attach detection (high-impedance divider + TVS, §12). Port A VBUS goes straight to the charger input on Base — no mux in the path, no change to Base's PD behaviour or certification population.- **Cost:** ≈ +$3–4 on Pro only (verify, `10-bom.md`). --- ## 8. Charging BQ25792 configuration:- Cell count 2S, charge voltage 8.40 V (4.20 V/cell); option to set 8.30 V (4.15 V/cell) in a "battery longevity" mode (+~40 % cycle life, −5 % capacity).- Fast charge current 5.0 A (2.5 A/cell = 0.5 C for 50E class; check 50E "standard charge 2.45 A" and set 4.9 A if strict) (verify). Pre-charge 500 mA below 6.0 V. Termination 250 mA.- Input current limit from the PD contract of whichever sink port the priority mux has selected (Port A; else Port C on Pro) via the TPS25750/EC; ICO (input current optimizer) enabled for non-PD sources (a Mac's 5 V/3 A default offer is a PD contract, so the limit is set to 3 A explicitly). On a mux switchover the EC re-programs the limit *before* the new input is made (break-before-make).- JEITA: charge allowed 0–45 °C; 0–10 °C at 0.25 C (2.5 A); 45–50 °C hold at 8.2 V/1 A; > 50 °C or < 0 °C no charge (discharge permitted to −20 °C, §10 of `06-thermal.md`). Pack NTCs read by BQ40Z50 (primary) and TS pin (secondary).- Thermal regulation: BQ25792 die 120 °C fold-back; EC additionally derates charge to 3 A when chassis skin > 42 °C and to 1.5 A at the 48 °C throttle rung (charger + 15 W load + 42 W charge = ~5 W dissipated in the charger area on the magnesium bottom-band land — see `06-thermal.md` §7.2); charging stops at Throttle 2 and under the thermal-safety standby (§10.1). Charge-time math (10 Ah pack, from 5 % SoC):- CC phase at 5 A until ~80 % SoC (~8.0 Ah delivered at 7.5 Ah net of the 5 % start): 7.5 Ah ÷ 5 A = **1.5 h → ~1.6 h** allowing for the first minutes of pre-charge/ramp.- CV taper from 80 % to 100 % (2.0 Ah at an average of ~2.8 A) ≈ 0.7 h.- **Total ≈ 2.3 h**, matching ADR §2. From a 45 W source: 42 W ÷ 8.0 V ≈ 5 A still — same time when idle; under upload load the charge current falls to ~3.4 A → ~3.0 h. --- ## 9. Fuel gauge and battery health - **BQ40Z50-R2** on the pack PCB: 1–4S Impedance Track gauge with integrated cell balancing (bleed), primary protection (OV/UV/OC/SC, temperature), SBS 1.1 over SMBus (100 kHz), authentication (SHA-1 challenge — used to reject counterfeit packs at service).- EC reads every 10 s: `RelativeStateOfCharge`, `RemainingCapacity`, `FullChargeCapacity` (→ **SOH = FCC / DesignCapacity**), `CycleCount`, `Voltage`, `Current`, `Temperature`, `AverageTimeToEmpty`, `SafetyStatus/PFStatus`, cell voltages (balance health).- Gauge configuration at PVT: golden-image learning cycle (charge–relax–discharge at 0.2 C at 25 °C) per cell type; chemistry ID selected from TI's database for the exact cell; `Design Capacity` 10,000 mAh, `Design Energy` 72,000 mWh.- **Runtime estimation** exposed to the app: the gauge's `AverageTimeToEmpty` is a 1-minute rolling average and is misleading during bursty uploads. The EC therefore maintains **learned per-mode average power** (EWMA over the last 20 min in each mode: 5GbE upload, Wi-Fi upload, hotspot upload, tethered upload — keyed by the tether-charge setting — reader, idle) seeded with the ADR §6.2 table, and reports: `runtime_current_mode = RemainingEnergy / P_mode` and `runtime_at_idle`. The SoC's job engine additionally reports "energy needed to finish queue" = Σ(bytes ÷ link rate × P_mode), so the app can say "Battery will last for this job: yes / need power in ~40 min".- Health UI: SOH %, cycle count, "replace battery" flag when SOH < 70 % or PF status set. Calibration prompt when the gauge's `MaxError` > 8 %. --- ## 10. Power-loss, brown-out and hold-up ### 10.1 Policy (implemented jointly by EC and SoC firmware)| SoC (gauge RSOC) | Action | Owner ||---|---|---|| 15 % | App + OLED warning; stop starting new NVMe quick-copies; Port B tether charging drops to 0.5 A (Rp re-advertised; saves 5 W at the 1.5 A default — the 3 A step is never active on battery, §7.4) with an app note "phone charging reduced" | SoC (Rp via EC) || 8 % | "Low battery — plug in" banner; Port B VBUS off if Port B holds an SSD or a phone that is *not* the active uplink (the phone runs on its own battery); if the tethered phone or USB adapter *is* the active uplink VBUS stays at 0.5 A until the 5 % pause, because removing VBUS drops the tether link | SoC (VBUS via EC) || **5 %** | **Graceful pause:** finish in-flight part (≤ 16 MB → ≤ 2 s on Ethernet/Wi-Fi, up to ~20 s on a slow hotspot/tether uplink — abort part if > 15 s), write part manifest + fsync job DB, stop new reads, `umount` all cards, `sync`, log, Port B VBUS off, request EC power-off. Budget **20 s**. | SoC, EC timer armed at 30 s || 3 % | EC hard cut: if the SoC has not signalled "ready to power off" within 30 s of the 5 % event or RSOC hits 3 %, EC asserts SoM power-down (PMIC `PWRON` off), then cuts slot eFuses (cards are unpowered ~200 ms after the SoM loses power — the read-only mounts mean no card FS metadata is dirty) | EC || Cell 2.8 V (pack 5.6 V) | BQ40Z50 UV protection opens discharge FET; EC AON LDO runs until ~2.5 V/cell then browns out; RTC is kept by a 3 mAh MS621 rechargeable coin cell (weeks) | Hardware || Power restored (PD attach) | EC starts charger; when RSOC ≥ 7 % (or PD source ≥ 30 W present), EC boots SoC; job engine resumes from the manifest **automatically** | EC → SoC | Because cards are mounted read-only and the job manifest lives on eMMC with `fsync` after every part, the worst-case loss from a hard cut is the in-flight part (re-uploaded on resume). No card is ever left with dirty metadata by PoppyUp. **Thermal-safety standby (ADR §3.5, D2; `06-thermal.md` §7.2) re-uses this flow.** When skin ≥ 52 °C, internal air ≥ 60 °C, battery ≥ 55 °C or a component limit is crossed, the EC issues a `thermal_standby_request`; the SoC runs the same **graceful pause** as the 5 % row (checkpoint every job at a part boundary, manifest + fsync, `umount`, Port B VBUS off, charging off) within the same 20 s budget, backed by the same 30 s EC hard-cut timer; the EC then holds the SoC off (standby, §11) with the OLED showing "Too hot — paused, will resume" and notifies the app over BLE. Unlike the battery flow, the EC **auto-boots the SoC when skin ≤ 42 °C and internal air ≤ 45 °C** (with link and cards still present), Port B VBUS is re-applied at the pre-pause setting (tether link re-establishes) and the job engine resumes from the manifest. Charging restarts under the JEITA / skin rules of §8. The independent 48 °C mechanical thermal switch (ADR §3.5) is the hardware backstop; its placement and the circuit it interrupts are fixed at EVT schematic release (`06-thermal.md` §12 item 10). Thermal throttling above this rung (charge derate at 42 °C, Port B to 0.5 A at 45 °C, 2.5G / duty-cycling at 48 °C, reads paused at 50 °C) is in `06-thermal.md` §7.2 and touches only the Port B Rp, the charge current and the job engine's throughput budget — never the rails. ### 10.2 Why no supercapacitorThe pack is non-removable and always in circuit; it *is* the hold-up. The only transient that needs energy storage is the charger's input-removal switchover (PD unplug under 15 W load; on Pro also the break-before-make gap of the Port A/Port C priority mux, §4): BQ25792 NVDC switches from adapter to battery within ~20 µs (verify), during which VSYS must not droop more than 200 mV at up to a 5 A step: C ≥ I·Δt / ΔV = 5 A × 20 µs / 0.2 V = 500 µF → **2 × 470 µF polymer (16 V) on VSYS** plus 4 × 22 µF ceramic for ESR/ESL, and each buck's own input capacitance. A supercapacitor would add ~$4, volume, and a charge-control circuit for no functional benefit. ### 10.3 eMMC and storage- eMMC 5.1 with vendor power-loss protection (Kioxia/Micron industrial with "power-off notification" honoured by the driver); job DB is SQLite in WAL mode with `synchronous=FULL` on an ext4/f2fs partition mounted `data=journal` or f2fs with `fsync_mode=strict`.- Rootfs is dm-verity read-only; A/B slots (`08-…`/RAUC) so an interrupted OTA never bricks. ### 10.4 Brown-out detection- BQ25792 `VSYSMIN` set to 6.0 V; EC monitors VSYS via ADC at 1 kHz and asserts SoC `PMIC_INT`/GPIO "power warning" if VSYS < 6.2 V for > 5 ms (only possible on a failed pack or protector trip) — job engine treats this as the 5 % event with a 2 s budget.- SoM PMIC (RK806) has its own UVLO on 5 V; we never rely on it for data integrity. ### 10.5 Cold boot after full depletionPack at UV cutoff → PD attached → BQ25792 pre-charges at 500 mA (trickle from `VBAT < 6.0 V`) → BQ40Z50 wakes when cell > 3.0 V, closes FETs → EC boots from AON LDO → after RSOC ≥ 7 % or 30 W source present, EC boots SoC. Time from dead to "uploading again" on a 65 W brick: ~6–8 min. --- ## 11. Standby and wake architecture - **AON domain (~50 mW):** nRF5340 (BLE advertising 1 s interval ≈ 15 µA avg at 3.3 V; radio+MCU active on connection ≈ 5 mA), Hall sensor (µA, polled), card-detect switches (GPIO with pull-ups, interrupt), power button, RTC (nRF internal + coin cell), BQ40Z50 SMBus (gauge itself in sleep ≈ 50 µA), TPS7A16 Iq 5 µA. Budget 15 mA average → 0.05 W ✓.- **SoC off, not suspended:** RK3588 suspend-to-RAM measures ~0.4 W on SoM (LPDDR self-refresh + PMIC) (verify) — that alone would cut standby from 27 days to ~7. Full off costs a ~12 s boot (SPL → U-Boot → kernel → job engine) which is acceptable because the trigger events (card insert, cable attach) are followed by seconds of user handling anyway. Boot time is a firmware-phase target (≤ 8 s).- **Wake sources into EC → SoC boot:** power button (short press), any card-detect (spec: "upload begins as soon as a card is inserted"), PD/VBUS attach on Port A, Port C attach (Pro), BLE connection from the paired app with "wake" command, RTC alarm (scheduled retry window for a paused queue, e.g., "resume at 06:00 when the venue network is quiet"), shutter open (Hall) — configurable; default wake on shutter open so the device is booting while the user reaches for a card.- **Auto-standby:** no cards, no link activity and no app connection for 10 min → SoC graceful off. Cards inserted but queue complete and verified → 30 min. Standby math (repeat): 65 Wh ÷ 0.1 W = 650 h ≈ 27 d; minus 10 % boot reserve and gauge error → **~3 weeks** guaranteed; self-discharge (~0.002 W) is second-order. --- ## 12. Safety | Hazard | Mitigation ||---|---|| External port short (Ports A/B/C VBUS, RJ45) | Port B: TPS2596 eFuse 3.3 A trip, 1 ms fault latch/retry. Port A source: 1.5 A eFuse (part of TPS25750/BQ25792 source path with current limit). Port C: no VBUS sourced (sink only, Pro). RJ45: PoE-in not supported — Bob Smith termination and 2 kV isolation magnetics. || Reverse current into the device (foreign VBUS on Port B) and between the two sink ports | Port B eFuse with reverse-current blocking. Pro: the TPS2121-class priority mux blocks Port A VBUS from appearing on Port C and vice versa (verify reverse-blocking spec); each sink port has its own TPS25750 OVP at 22 V + TVS. Base: Port C VBUS pin only to attach detection (high-impedance divider + TVS). || Battery over-charge / over-discharge / over-current / short | Primary: BQ40Z50 FETs (OV 4.25 V, UV 2.8 V, OCD 15 A, SC 40 A) ; Secondary: BQ294xx opens chemical fuse at 4.35 V/cell ; Charger: BQ25792 own OVP/OCP. Three independent layers per IEC 62133-2 / UL 2054 expectations. || Cell temperature | 2 NTCs; charge window 0–45 °C (JEITA), discharge cut-off at −20 °C / +60 °C by protector; skin-temperature throttling before that (`06-thermal.md`). || Mechanical (drop, crush) | Cells in PC+GF holder with 2 mm PORON; pack passes UN 38.3 T3/T4/T6 (vibration, shock, impact/crush) as a subassembly. || Single-fault power path | Fuse rated 10 A (2× max continuous) interrupts on protector failure; PCB traces sized for 2× fuse rating to the fuse. || UL/IEC 62368-1 | Battery is an ES1/PS2 energy source inside a fire enclosure (magnesium AZ91D chassis, 1.6 mm walls, + V-0 rated PC+GF — verify with the NRTL that the thin-wall magnesium casting is accepted as fire-enclosure material); external ports PS1; enclosure temperatures held below touch limits by throttling (48 °C metal, 55 °C plastic — the "handheld" limits of 62368-1 Table 38 (verify)). || Transport | Pack ≤ 100 Wh, ≤ 30 % SoC for air freight of finished goods (packaging label per IATA PI 967 Section II). | --- ## 13. Open items and notes against the ADR 1. *Resolved in ADR v0.2:* the 3.3 V LOGIC rail is now specified at 4 A (Pro-SKU peak ≈ 3.1 A), matching §3.2 (LMR33640).2. ADR §6.2 host modes (USB4 path, gadget path) omit Wi-Fi idle power (0.3 W). Either the ADR should state "Wi-Fi sleeps in reader mode" (firmware policy) or the totals rise to 9.3 / 8.0 W. This document assumes the former.3. ADR §6.2 idle-awake uses 88 % efficiency; at 3.3 W the switchers are in PFM and 85 % is more realistic (3.9 W, 16.7 h vs 17 h). Minor.4. *Resolved in ADR v0.3:* ADR §6 now lists the dedicated 5.0 V/3 A PORT B buck (TPS62933 class) separately from the 5.0 V/6 A SYS rail, as specified in §3.3/§5 here.5. NVMe power source on Pro SKU (slots rail vs. its own buck) is an EVT decision; slots rail must be raised to 6 A if shared.6. Cell fast-charge rating: if the chosen cell is limited to 2.45 A standard charge, set fast charge to 4.9 A; charge times unchanged within rounding.7. *Resolved in ADR v0.3:* ADR §6 now says "realistic coincident peak" ≈ 28 W (SoM 8 + CFe B 5 + Port B 15) and notes the ~55 W arithmetic sum is not a design case. Kept here for cell and VSYS sizing; note that with the 3 A Port B step now PD-only the 28 W coincident peak on the *pack* is a PD-unplug transient, not a steady battery case.8. *Resolved in ADR v0.3 (D13):* the 3 A tether-charge setting is available only while a PD source is attached (EC-enforced, §7.4); the v0.2 2.7 h battery case is withdrawn from §6.4/§6.11. App label: "fast phone charge — needs PoppyUp plugged in".9. USB LTE/5G adapter power on Port B (2–5 W typical) is not in ADR §6.1; measure the two or three adapters we intend to recommend at PoC and add a row.10. *Resolved in ADR v0.3:* ADR §6.1 reads "5GbE link" for the RTL8126 active figure.11. **Port C PD sink (D7, Pro) — items to verify before EVT schematic release:** (a) TPS2121 (or chosen ORing device) rating at 20 V / 3.25 A continuous and its reverse-blocking with one port unpowered; (b) switchover timing vs the BQ25792 supplement-mode entry so the break-before-make gap is covered by the §10.2 bulk capacitance under the ~20 W worst-combined load; (c) TPS25750 sink-only configuration coexisting with the ASM2464PD's USB4 alt-mode/PD data-role handling on the same CC lines (or whether a TPS65987D-class controller must own Port C PD entirely); (d) the 0 mA phone rule on Port C for an iPhone Pro; (e) Base-SKU depopulation leaves Port A VBUS with a 0 Ω path (no mux footprint in series) so Base certification does not depend on the mux.12. Port B `PD_PRESENT` policy detail: define the minimum PD contract that enables the 3 A step (proposed ≥ 45 W, so that source, not pack, covers 15 W to the phone plus the device; a 15 W Mac on Port C does *not* enable it) and the Rp step-down sequence on source removal (§4, §7.4).13. 48 °C mechanical thermal switch (ADR §3.5): location and interrupted circuit unspecified in any document — see `06-thermal.md` §12 item 10; recommend the charge path / pack region so it never trips at the normal 48 °C skin cap.