README.md
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# PoppyUp — Phase 1 Hardware Design Package Rugged, battery-powered camera-media offload device in a magnesium chassis: insert a professional camera card, and PoppyUp streams it read-only to SFTP / S3-compatible / Google Drive / Dropbox over 5GbE Ethernet or Wi-Fi 7, or through a USB-tethered phone / USB cellular adapter on Port B (no built-in modem). Plugged into a Mac, PC, iPad or iPhone it becomes a driverless, **read-only-by-default** card reader — over Port A on every SKU, and at USB4 speed over Port C on the Pro SKU only. **This package is the Phase 1 (hardware architecture) deliverable set.** No firmware or app code is included by design. ## v0.2 → v0.3 diff summary (owner review, 2026-09-27) Full change record: `docs/00-architecture-decisions.md` §15. The ADR wins over every other document. **Decisions D1–D13** - **D1** Cellular removal confirmed final; no reinstatement provisions (no Key-B slot, SIM aperture or antenna windows).- **D2** Operating assumption: desk/table operation, bag = transport only; in-bag heuristic and tests deleted; firmware thermal safety rule added (52 °C skin / 60 °C air → checkpoint → standby → auto-resume).- **D3** Size final: CFast kept, 190 × 96 × 38 mm; rear slack to SoM boss and gap pads; no drawing change.- **D4** Chassis material: magnesium AZ91D hot-chamber die-cast (machined AZ31B / thixomolded AZ91D at EVT/DVT); chromate-free conversion coat + powder/e-coat, galvanic isolation rules, castability checked; ~828 g.- **D5** Passive cooling for EVT; fan envelope reserved; fan decision at the EVT-exit gate on AZ91D-corrected data with defined pass criteria.- **D6** Ethernet 5GBASE-T RTL8126 only; RTL8127 / 10GbE option and watch item removed.- **D7** Port C USB4 pass-through Pro-only (depop on Base), decoupled from Base launch (feature flag, separate Pro FCT, Pro regulatory addendum); Port C PD sink added (Pro).- **D8** Host mode read-only by default on both ports; Port C enforcement = NVMe namespace write-protect → bridge write-protect → explicit per-session consent + re-verification; tracked as a risk.- **D9** Port A: uploads pause while a host is attached; concurrent read-only sharing is an opt-in app setting.- **D10** XQD unsupported, not marketed, no licensing, no USB-reader workaround; only the "XQD not supported" detection message remains.- **D11** Two-slat roll-top shutter approved unchanged; open-shutter thermal effect modelled.- **D12** ASMedia primary (owner's access team), PEX8724 fallback retained at EVT freeze; ODM/CM engaged (design-review package before EVT schematic); SoM undecided — PoC bake-off of Firefly, Forlinx and ODM board-down RK3588J.- **D13** 2.42" OLED and 72 Wh confirmed; no GPS — phone location over BLE/NCM into job metadata; Port B 1.5 A default, 3 A only with external PD present. **Key numbers that moved** | Item | v0.2 | v0.3 ||---|---|---|| Mass | ~935 g (aluminum) | **~828 g (magnesium)** || Passive ceiling at 25 / 35 °C | 10.6 / 6.0 W | **10.0 / 5.7 W shutter closed; 9.5 / 5.4 W open** || 5GbE burst before throttling (25 °C) | ~20 min | **~17 min** || Per-mode ambient ceilings | — | **−1…−2 K** (ADR §6.2) || Base BOM (1 k / 10 k) | $476 / $321 | **~$490 / ~$325** || Pro BOM (1 k / 10 k) | $559 / $389 | **~$575 / ~$400** || Tooling | ~$189 k | **~$195 k** || Hardware program to MP | $1.0–1.3 M | **$1.1–1.4 M** || Full program (hardware + staffing + Phase 2/3 + contingency) | — | **≈ $3.2–3.9 M (ODM-supported) to ≈ $5.5–6.5 M (US fully-loaded)**, `docs/13-roadmap.md` §8 || Runtimes | — | **unchanged** (Port B 3 A is no longer a battery case) | **Documents touched:** all — `docs/00`–`13`, this README; drawings unchanged (no dimensional change, D3). ## Read in this order **Revision:** ADR v0.3 (2026-09-27) — owner review decisions D1–D13 applied (magnesium chassis, desk-operation assumption, Port C Pro-only and decoupled, read-only host mode, SoM bake-off, ODM engaged); see `docs/00-architecture-decisions.md` §15 and the diff summary above.**Previous:** ADR v0.2 (2026-09-27) — built-in 5G modem removed; see `docs/00-architecture-decisions.md` §14. | # | Document | What it answers ||---|---|---|| 00 | [`docs/00-architecture-decisions.md`](docs/00-architecture-decisions.md) | **Single source of truth.** Every decision, every target number, SKU definition, open questions. Read this first. || 01 | [`docs/01-requirements.md`](docs/01-requirements.md) | Functional / non-functional requirements with measurable acceptance criteria || 02 | [`docs/02-system-architecture.md`](docs/02-system-architecture.md) | System block diagram (Mermaid), PCIe/USB topology, **mode switching** design, power-state machine, EC↔SoC interface || 03 | [`docs/03-datapath-bottlenecks.md`](docs/03-datapath-bottlenecks.md) | Every link's real throughput, per-mode limiting factor, upload-time worked examples || 04 | [`docs/04-component-selection.md`](docs/04-component-selection.md) | 2–4 options per subsystem, final pick and reasoning, part numbers || 05 | [`docs/05-power-budget.md`](docs/05-power-budget.md) | Battery, power tree, per-rail and per-mode budget, runtime, PD, hold-up / graceful shutdown || 06 | [`docs/06-thermal.md`](docs/06-thermal.md) | Heat sources, sealed-enclosure ceiling, conduction paths, throttling ladder || 07 | [`docs/07-rf-antenna.md`](docs/07-rf-antenna.md) | Antenna count/placement (Wi-Fi + BLE), RF windows in a metal enclosure, coexistence, validation || 08 | [`docs/08-mechanical.md`](docs/08-mechanical.md) | Envelope, materials, internal layout, top-edge slots, sliding shutter mechanism, drop/IP design || 09 | [`docs/09-pcb-architecture.md`](docs/09-pcb-architecture.md) | Board partitioning, stackups, high-speed rules, connectors, test strategy || 10 | [`docs/10-bom.md`](docs/10-bom.md) | Line-item BOM at 1k / 10k, Base vs Pro, tooling/NRE, cost-down levers || 11 | [`docs/11-certification.md`](docs/11-certification.md) | FCC/ISED/CE (Wi-Fi/BLE only — no cellular certification), battery, safety, ruggedness, logos; cost and timeline || 12 | [`docs/12-risks-open-questions.md`](docs/12-risks-open-questions.md) | Ranked risk register with mitigations; owner decisions Q1–Q17 with status; remaining open items || 13 | [`docs/13-roadmap.md`](docs/13-roadmap.md) | PoC → EVT → DVT → PVT → MP: what is built and validated at each stage; SoM bake-off, ODM design review, fan gate, Pro track; full program cost view | Drawings (SVG, 1 mm = 4 px; regenerate with `python3 drawings/generate_drawings.py` after ADR changes): [`drawings/top-view.svg`](drawings/top-view.svg), [`drawings/front-view.svg`](drawings/front-view.svg), [`drawings/side-view.svg`](drawings/side-view.svg), [`drawings/exploded-view.svg`](drawings/exploded-view.svg). **Wiring diagrams** (logical interconnect set, SVG + PDF, DRAFT — FOR REVIEW): [`wiring/`](wiring/README.md) — ten A3 sheets PU-W-000…301 (system interconnect, power distribution, EC control wiring, CFe B mode-switch path, mezzanine pin diagram, battery pack, external ports, peripheral pinouts, connection schedule) generated from `wiring/model.py`; regenerate with `python3 wiring/build.py`. Building it surfaced 16 source-document conflicts (OI-1…OI-16 on sheet PU-W-000) for the next ADR revision. **3D mode** (interactive assembly explorer, browser-based, offline): serve the `viewer/` folder and open `index.html` — `python3 -m http.server 8000 -d viewer` then http://localhost:8000/. Component tree, labels, exploded view, isolation, section plane, Base/Pro SKU toggle. Geometry is generated from the numbers in `docs/08`, `docs/09` and the drawings; on-board component placements are approximate. See [`viewer/README.md`](viewer/README.md) for the evidence register and validation results. ## The architecture in six lines 1. **Compute:** Rockchip RK3588 (industrial RK3588J), 8 GB / 64 GB, TPM 2.0, always-on nRF5340 embedded controller with BLE. **Carrier form undecided:** Firefly Core-3588J vs Forlinx FET3588-C vs board-down on the ODM's reference design — PoC bake-off, decided at PoC exit (D12).2. **Card fabric:** CFexpress B gets a dedicated PCIe Gen3 ×2 root port through a Gen4-rated mux; every other slot (CFe A, SD UHS-II, microSD, CFast) and the optional NVMe, 5GbE and a 10 Gbps USB host hang off an ASM2812 PCIe switch.3. **Host mode, two paths, read-only by default (D8):** Port A (USB-C) exposes all cards as read-only USB mass storage at 5 Gbps and works with every host including iPhone (writes only by explicit app toggle per session); Port C (USB4, **Pro SKU only, decoupled from Base launch — D7**) passes the CFexpress B card straight through an ASM2464PD bridge at ~3 GB/s to Macs/PCs and ~900 MB/s to iPhone Pro, write-protected via NVMe namespace WP where the card supports it and otherwise consent-gated; Port C also accepts PD power from the Mac (Pro).4. **Network:** RTL8126 5GBASE-T (**final, D6 — no 10GbE option**), MediaTek MT7925 Wi-Fi 7, BLE 5.4 on the EC; 2 Wi-Fi + 1 BLE antennas behind polycarbonate windows in the front frame of a magnesium chassis. No built-in cellular (removed in ADR v0.2, confirmed final in v0.3 — cellular reach via the user's phone or a USB adapter on Port B).5. **Power:** 4× 21700 (2S2P, 72 Wh), BQ25792 buck-boost charger from 65 W USB-C PD, BQ40Z50 gauge; 4–6 h of continuous upload, ~3 weeks standby.6. **Mechanical:** 190 × 96 × 38 mm (final, D3), **~828 g, magnesium AZ91D die-cast heat-spreading chassis (chromate-free conversion coat + powder/e-coat, D4)** + PC/GF front frame + TPU bumpers, five slots on the top edge under a two-slat sliding hard-anodized aluminum shutter (approved unchanged, D11); MIL-STD-810H 1.22 m drop, IP54 closed. Designed for desk/table operation; a bag is for transport only (D2), with a firmware thermal safety rule as the backstop. Passive cooling for EVT; fan decided at the EVT-exit gate (D5). ## Owner decisionsQ1–Q17 with status are in `docs/00-architecture-decisions.md` §13 (mirrored in `docs/12-risks-open-questions.md` §3). After the v0.3 review, sixteen are closed; still open: SoM / board-down (PoC exit), fan (EVT exit), the Port C read-only mechanism (verify at PoC), magnesium coupon and thermal-correction results (EVT), and the target retail price / program budget ceiling (owner).